amd/sb600: Move HAVE_HARD_RESET to southbridge
[coreboot.git] / src / mainboard / siemens / sitemp_g1p1 / Kconfig
1 if BOARD_SIEMENS_SITEMP_G1P1
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_S1G1
7         select NORTHBRIDGE_AMD_AMDK8
8         select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
9         select SOUTHBRIDGE_AMD_RS690
10         select SOUTHBRIDGE_AMD_SB600
11         select SUPERIO_ITE_IT8712F
12         select BOARD_HAS_FADT
13         select HAVE_ACPI_TABLES
14         select HAVE_MP_TABLE
15         select HAVE_PIRQ_TABLE
16         select HAVE_OPTION_TABLE
17         select HAVE_MAINBOARD_RESOURCES
18         select HAVE_BUS_CONFIG
19         select SB_HT_CHAIN_UNITID_OFFSET_ONLY
20         select BOARD_ROMSIZE_KB_1024
21         select RAMINIT_SYSINFO
22         select QRANK_DIMM_SUPPORT
23         select SET_FIDVID
24         select GFXUMA
25         select EXT_CONF_SUPPORT
26
27 config MAINBOARD_DIR
28         string
29         default siemens/sitemp_g1p1
30
31 config LINT01_CONVERSION
32         bool
33         default y
34
35 config APIC_ID_OFFSET
36         hex
37         default 0x0
38
39 config MAINBOARD_PART_NUMBER
40         string
41         default "MB SITEMP-G1 (U1P0/U1P1)"
42
43 config MAX_CPUS
44         int
45         default 2
46
47 config MAX_PHYSICAL_CPUS
48         int
49         default 1
50
51 config SB_HT_CHAIN_ON_BUS0
52         int
53         default 1
54
55 config HT_CHAIN_END_UNITID_BASE
56         hex
57         default 0x1
58
59 config HT_CHAIN_UNITID_BASE
60         hex
61         default 0x0
62
63 config IRQ_SLOT_COUNT
64         int
65         default 11
66
67 config IOMMU
68         bool
69         default n
70
71 config HW_SCRUBBER
72         bool
73         default n
74
75 config ECC_MEMORY
76         bool
77         default n
78
79 endif # BOARD_SIEMENS_SITEMP_G1P1