2 * This file is part of the coreboot project.
4 * Copyright (C) 2007-2009 coresystems GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
23 #include <console/console.h>
25 #include <arch/acpi.h>
26 #include <arch/acpigen.h>
27 #include <arch/smp/mpspec.h>
28 #include <device/device.h>
29 #include <device/pci.h>
30 #include <device/pci_ids.h>
33 extern const unsigned char AmlCode[];
34 #if CONFIG_HAVE_ACPI_SLIC
35 unsigned long acpi_create_slic(unsigned long current);
40 static void acpi_create_gnvs(global_nvs_t *gnvs)
42 memset (gnvs, 0, sizeof(global_nvs_t));
78 gnvs->DID1 = 0x80000100;
79 gnvs->DID2 = 0x80000240;
80 gnvs->DID3 = 0x80000410;
81 gnvs->DID4 = 0x80000410;
82 gnvs->DID5 = 0x00000005;
88 // tolud = pci_read_config32(dev_find_slot(0, PCI_DEVFN(2, 0)), 0x5c);
89 // oemb->topm = tolud;
93 #include "southbridge/intel/i82801gx/i82801gx_nvs.h"
94 static void acpi_create_gnvs(global_nvs_t *gnvs)
96 memset((void *)gnvs, 0, sizeof(*gnvs));
98 gnvs->mpen = 1; /* Enable Multi Processing */
100 /* Enable both COM ports */
106 gnvs->did[0] = 0x80000100;
107 gnvs->did[1] = 0x80000240;
108 gnvs->did[2] = 0x80000410;
109 gnvs->did[3] = 0x80000410;
110 gnvs->did[4] = 0x00000005;
113 static void acpi_create_intel_hpet(acpi_hpet_t * hpet)
115 #define HPET_ADDR 0xfed00000ULL
116 acpi_header_t *header = &(hpet->header);
117 acpi_addr_t *addr = &(hpet->addr);
119 memset((void *) hpet, 0, sizeof(acpi_hpet_t));
121 /* fill out header fields */
122 memcpy(header->signature, "HPET", 4);
123 memcpy(header->oem_id, OEM_ID, 6);
124 memcpy(header->oem_table_id, "COREBOOT", 8);
125 memcpy(header->asl_compiler_id, ASLC, 4);
127 header->length = sizeof(acpi_hpet_t);
128 header->revision = 1;
130 /* fill out HPET address */
131 addr->space_id = 0; /* Memory */
132 addr->bit_width = 64;
133 addr->bit_offset = 0;
134 addr->addrl = HPET_ADDR & 0xffffffff;
135 addr->addrh = HPET_ADDR >> 32;
137 hpet->id = 0x8086a201; /* Intel */
139 hpet->min_tick = 0x0080;
142 acpi_checksum((void *) hpet, sizeof(acpi_hpet_t));
147 #define IO_APIC_ADDR 0xfec00000UL
149 unsigned long acpi_fill_madt(unsigned long current)
152 current = acpi_create_madt_lapics(current);
155 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
159 current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)
161 MP_IRQ_POLARITY_HIGH |
162 MP_IRQ_TRIGGER_EDGE, 0x01);
163 current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)
164 current, 1, MP_IRQ_POLARITY_HIGH |
165 MP_IRQ_TRIGGER_EDGE, 0x01);
168 current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
169 current, 0, 0, 2, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_EDGE);
170 current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
171 current, 0, 9, 9, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_LEVEL);
177 unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id)
179 generate_cpu_entries();
180 return (unsigned long) (acpigen_get_current());
183 unsigned long acpi_fill_slit(unsigned long current)
189 unsigned long acpi_fill_srat(unsigned long current)
191 /* No NUMA, no SRAT */
195 void smm_setup_structures(void *gnvs, void *tcg, void *smi1);
197 #define ALIGN_CURRENT current = ((current + 0x0f) & -0x10)
198 unsigned long write_acpi_tables(unsigned long start)
200 unsigned long current;
210 #if CONFIG_HAVE_ACPI_SLIC
219 /* Align ACPI tables to 16byte */
222 printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start);
224 /* We need at least an RSDP and an RSDT Table */
225 rsdp = (acpi_rsdp_t *) current;
226 current += sizeof(acpi_rsdp_t);
228 rsdt = (acpi_rsdt_t *) current;
229 current += sizeof(acpi_rsdt_t);
231 xsdt = (acpi_xsdt_t *) current;
232 current += sizeof(acpi_xsdt_t);
235 /* clear all table memory */
236 memset((void *) start, 0, current - start);
238 acpi_write_rsdp(rsdp, rsdt, xsdt);
239 acpi_write_rsdt(rsdt);
240 acpi_write_xsdt(xsdt);
243 * We explicitly add these tables later on:
245 printk(BIOS_DEBUG, "ACPI: * HPET\n");
247 hpet = (acpi_hpet_t *) current;
248 current += sizeof(acpi_hpet_t);
250 acpi_create_intel_hpet(hpet);
251 acpi_add_table(rsdp, hpet);
253 /* If we want to use HPET Timers Linux wants an MADT */
254 printk(BIOS_DEBUG, "ACPI: * MADT\n");
256 madt = (acpi_madt_t *) current;
257 acpi_create_madt(madt);
258 current += madt->header.length;
260 acpi_add_table(rsdp, madt);
262 printk(BIOS_DEBUG, "ACPI: * MCFG\n");
263 mcfg = (acpi_mcfg_t *) current;
264 acpi_create_mcfg(mcfg);
265 current += mcfg->header.length;
267 acpi_add_table(rsdp, mcfg);
269 printk(BIOS_DEBUG, "ACPI: * FACS\n");
270 facs = (acpi_facs_t *) current;
271 current += sizeof(acpi_facs_t);
273 acpi_create_facs(facs);
275 dsdt = (acpi_header_t *) current;
276 memcpy(dsdt, &AmlCode, sizeof(acpi_header_t));
277 current += dsdt->length;
278 memcpy(dsdt, &AmlCode, dsdt->length);
280 /* Fix up global NVS region for SMI handler. The GNVS region lives
281 * in the (high) table area. The low memory map looks like this:
283 * 0x00000000 - 0x000003ff Real Mode IVT
284 * 0x00000020 - 0x0000019c Low MP Table (XXX conflict?)
285 * 0x00000400 - 0x000004ff BDA (somewhat unused)
286 * 0x00000500 - 0x0000052f Moved GDT
287 * 0x00000530 - 0x00000b64 coreboot table
288 * 0x0007c000 - 0x0007dfff OS boot sector (unused?)
289 * 0x0007e000 - 0x0007ffff free to use (so no good for acpi+smi)
290 * 0x00080000 - 0x0009fbff usable ram
291 * 0x0009fc00 - 0x0009ffff EBDA (unused?)
292 * 0x000a0000 - 0x000bffff VGA memory
293 * 0x000c0000 - 0x000cffff VGA option rom
294 * 0x000d0000 - 0x000dffff free for other option roms?
295 * 0x000e0000 - 0x000fffff SeaBIOS? (conflict with low tables:)
296 * 0x000f0000 - 0x000f03ff PIRQ table
297 * 0x000f0400 - 0x000f66?? ACPI tables
298 * 0x000f66?? - 0x000f???? DMI tables
303 /* Pack GNVS into the ACPI table area */
304 for (i=0; i < dsdt->length; i++) {
305 if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) {
306 printk(BIOS_DEBUG, "ACPI: Patching up global NVS in DSDT at offset 0x%04x -> 0x%08x\n", i, (u32)current);
307 *(u32*)(((u32)dsdt) + i) = current; // 0x92 bytes
313 acpi_create_gnvs((global_nvs_t *)current);
315 /* Keep pointer around */
316 gnvs = (void *)current;
321 /* And tell SMI about it */
322 smm_setup_structures(gnvs, NULL, NULL);
324 /* We patched up the DSDT, so we need to recalculate the checksum */
326 dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length);
328 printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt,
331 #if CONFIG_HAVE_ACPI_SLIC
332 printk(BIOS_DEBUG, "ACPI: * SLIC\n");
333 slic = (acpi_header_t *)current;
334 current += acpi_create_slic(current);
336 acpi_add_table(rsdp, slic);
339 printk(BIOS_DEBUG, "ACPI: * FADT\n");
340 fadt = (acpi_fadt_t *) current;
341 current += sizeof(acpi_fadt_t);
344 acpi_create_fadt(fadt, facs, dsdt);
345 acpi_add_table(rsdp, fadt);
347 printk(BIOS_DEBUG, "ACPI: * SSDT\n");
348 ssdt = (acpi_header_t *)current;
349 acpi_create_ssdt_generator(ssdt, "COREBOOT");
350 current += ssdt->length;
351 acpi_add_table(rsdp, ssdt);
354 printk(BIOS_DEBUG, "current = %lx\n", current);
356 printk(BIOS_DEBUG, "ACPI: * DMI (Linux workaround)\n");
357 memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE);
358 #if CONFIG_WRITE_HIGH_TABLES == 1
359 memcpy((void *)current, dmi_table, DMI_TABLE_SIZE);
360 current += DMI_TABLE_SIZE;
364 printk(BIOS_INFO, "ACPI: done.\n");
366 /* Enable Dummy DCC ON# for DVI */
367 printk(BIOS_DEBUG, "Laptop handling...\n");
368 outb(inb(0x60f) & ~(1 << 5), 0x60f);