1 chip northbridge/amd/amdk8/root_complex
2 device lapic_cluster 0 on
8 chip northbridge/amd/amdk8 #mc0
10 # devices on link 0, link 0 == LDT 0
11 chip southbridge/nvidia/mcp55
12 device pci 0.0 on end # HT
13 device pci 1.0 on # LPC
14 chip superio/winbond/w83627ehg
15 device pnp 2e.0 off # Floppy
20 device pnp 2e.1 off # Parallel Port
24 device pnp 2e.2 on # Com1
28 device pnp 2e.3 off # Com2
32 device pnp 2e.5 on # Keyboard
38 device pnp 2e.6 off # SFI
41 device pnp 2e.7 off # GPIO_GAME_MIDI
46 device pnp 2e.8 off end # WDTO_PLED
47 device pnp 2e.9 off end # GPIO_SUSLED
48 device pnp 2e.a off end # ACPI
49 device pnp 2e.b on # HW Monitor
55 device pci 1.1 on # SM 0
56 chip drivers/generic/generic #dimm 0-0-0
59 chip drivers/generic/generic #dimm 0-0-1
62 chip drivers/generic/generic #dimm 0-1-0
65 chip drivers/generic/generic #dimm 0-1-1
68 chip drivers/generic/generic #dimm 1-0-0
71 chip drivers/generic/generic #dimm 1-0-1
74 chip drivers/generic/generic #dimm 1-1-0
77 chip drivers/generic/generic #dimm 1-1-1
81 device pci 1.1 on # SM 1
82 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?
83 # chip drivers/generic/generic #PCIXA Slot1
84 # device i2c 50 on end
86 # chip drivers/generic/generic #PCIXB Slot1
87 # device i2c 51 on end
89 # chip drivers/generic/generic #PCIXB Slot2
90 # device i2c 52 on end
92 # chip drivers/generic/generic #PCI Slot1
93 # device i2c 53 on end
95 # chip drivers/generic/generic #Master MCP55 PCI-E
96 # device i2c 54 on end
98 # chip drivers/generic/generic #Slave MCP55 PCI-E
99 # device i2c 55 on end
101 chip drivers/generic/generic #MAC EEPROM
106 device pci 2.0 on end # USB 1.1
107 device pci 2.1 on end # USB 2
108 device pci 4.0 on end # IDE
109 device pci 5.0 on end # SATA 0
110 device pci 5.1 on end # SATA 1
111 device pci 5.2 on end # SATA 2
112 device pci 6.0 on end # PCI
113 device pci 6.1 on end # AZA
114 device pci 8.0 on end # NIC
115 device pci 9.0 on end # NIC
116 device pci a.0 on end # PCI E 5
117 device pci b.0 off end # PCI E 4
118 device pci c.0 off end # PCI E 3
119 device pci d.0 on end # PCI E 2
120 device pci e.0 off end # PCI E 1
121 device pci f.0 on end # PCI E 0
122 register "ide0_enable" = "1"
123 register "sata0_enable" = "1"
124 register "sata1_enable" = "1"
125 register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
126 register "mac_eeprom_addr" = "0x51"
128 end # device pci 18.0
129 device pci 18.0 on end # Link 1
131 # devices on link 2, link 2 == LDT 2
132 chip southbridge/nvidia/mcp55
133 device pci 0.0 on end # HT
134 device pci 1.0 on end # LPC
135 device pci 1.1 on end # SM 0
136 device pci 2.0 off end # USB 1.1
137 device pci 2.1 off end # USB 2
138 device pci 4.0 off end # IDE
139 device pci 5.0 on end # SATA 0
140 device pci 5.1 on end # SATA 1
141 device pci 5.2 on end # SATA 2
142 device pci 6.0 off end # PCI
143 device pci 6.1 off end # AZA
144 device pci 8.0 on end # NIC
145 device pci 9.0 on end # NIC
146 device pci a.0 on end # PCI E 5
147 device pci b.0 off end # PCI E 4
148 device pci c.0 off end # PCI E 3
149 device pci d.0 on end # PCI E 2
150 device pci e.0 on end # PCI E 1
151 device pci f.0 on end # PCI E 0
152 register "ide0_enable" = "1"
153 register "sata0_enable" = "1"
154 register "sata1_enable" = "1"
155 register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
156 register "mac_eeprom_addr" = "0x51"
158 end # device pci 18.0
159 device pci 18.1 on end
160 device pci 18.2 on end
161 device pci 18.3 on end
166 # chip drivers/generic/debug
167 # device pnp 0.0 off end # chip name
168 # device pnp 0.1 on end # pci_regs_all
169 # device pnp 0.2 on end # mem
170 # device pnp 0.3 off end # cpuid
171 # device pnp 0.4 on end # smbus_regs_all
172 # device pnp 0.5 off end # dual core msr
173 # device pnp 0.6 off end # cache size
174 # device pnp 0.7 off end # tsc
175 # device pnp 0.8 off end # io
176 # device pnp 0.9 off end # io