1 #include <console/console.h>
2 #include <arch/smp/mpspec.h>
3 #include <arch/ioapic.h>
4 #include <device/pci.h>
8 static void *smp_write_config_table(void *v)
10 struct mp_config_table *mc;
11 unsigned char bus_num;
12 unsigned char bus_isa;
13 unsigned char bus_8131_1;
14 unsigned char bus_8131_2;
15 unsigned char bus_8111_1;
17 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
19 mptable_init(mc, "KHEPRI ", LAPIC_ADDR);
21 smp_write_processors(mc);
27 dev = dev_find_slot(1, PCI_DEVFN(0x03,0));
29 bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
30 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
34 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
40 dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
42 bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
46 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
51 dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
53 bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
57 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
63 /* define bus and isa numbers */
64 for(bus_num = 0; bus_num < bus_isa; bus_num++) {
65 smp_write_bus(mc, bus_num, "PCI ");
67 smp_write_bus(mc, bus_isa, "ISA ");
71 smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
76 dev = dev_find_slot(1, PCI_DEVFN(0x01,1));
78 res = find_resource(dev, PCI_BASE_ADDRESS_0);
80 smp_write_ioapic(mc, 0x03, 0x11, res->base);
84 dev = dev_find_slot(1, PCI_DEVFN(0x02,1));
86 res = find_resource(dev, PCI_BASE_ADDRESS_0);
88 smp_write_ioapic(mc, 0x04, 0x11, res->base);
93 mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
95 /* Standard local interrupt assignments */
96 smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
97 bus_isa, 0x00, MP_APIC_ALL, 0x00);
98 smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
99 bus_isa, 0x00, MP_APIC_ALL, 0x01);
103 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
104 bus_8131_2, (1<<2)|0, 0x02, 0x11);
105 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
106 bus_8131_2, (1<<2)|1, 0x02, 0x12);
107 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
108 bus_8131_2, (1<<2)|2, 0x02, 0x13);
109 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
110 bus_8131_2, (1<<2)|3, 0x02, 0x10);
113 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
114 bus_8131_2, (2<<2)|0, 0x02, 0x12);
115 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
116 bus_8131_2, (2<<2)|1, 0x02, 0x13);
117 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
118 bus_8131_2, (2<<2)|2, 0x02, 0x10);
119 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
120 bus_8131_2, (2<<2)|3, 0x02, 0x11);
123 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
124 bus_8131_1, (1<<2)|0, 0x02, 0x11);
125 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
126 bus_8131_1, (1<<2)|1, 0x02, 0x12);
127 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
128 bus_8131_1, (1<<2)|2, 0x02, 0x13);
129 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
130 bus_8131_1, (1<<2)|3, 0x02, 0x10);
133 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
134 bus_8131_1, (2<<2)|0, 0x02, 0x12);
135 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
136 bus_8131_1, (2<<2)|1, 0x02, 0x13);
137 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
138 bus_8131_1, (2<<2)|2, 0x02, 0x10);
139 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
140 bus_8131_1, (2<<2)|3, 0x02, 0x11);
143 // FIXME get the irqs right, it's just hacked to work for now
144 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
145 bus_8111_1, (5<<2)|0, 0x02, 0x11);
146 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
147 bus_8111_1, (5<<2)|1, 0x02, 0x12);
148 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
149 bus_8111_1, (5<<2)|2, 0x02, 0x13);
150 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
151 bus_8111_1, (5<<2)|3, 0x02, 0x10);
154 // FIXME get the irqs right, it's just hacked to work for now
155 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
156 bus_8111_1, (4<<2)|0, 0x02, 0x10);
157 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
158 bus_8111_1, (4<<2)|1, 0x02, 0x11);
159 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
160 bus_8111_1, (4<<2)|2, 0x02, 0x12);
161 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
162 bus_8111_1, (4<<2)|3, 0x02, 0x13);
165 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
166 bus_8131_1, (3<<2)|0, 0x02, 0x13);
167 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
168 bus_8131_1, (4<<2)|0, 0x02, 0x13);
170 /* There is no extension information... */
172 /* Compute the checksums */
173 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
174 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
175 printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
176 mc, smp_next_mpe_entry(mc));
177 return smp_next_mpe_entry(mc);
180 unsigned long write_smp_table(unsigned long addr)
183 v = smp_write_floating_table(addr);
184 return (unsigned long)smp_write_config_table(v);