2 ## This file is part of the LinuxBIOS project.
4 ## Copyright (C) 2006 AMD
5 ## Written by Yinghai Lu <yinghailu@gmail.com> for AMD.
7 ## Copyright (C) 2006 MSI
8 ## Written by bxshi <bingxunshi@gmail.com> for MSI.
10 ## This program is free software; you can redistribute it and/or modify
11 ## it under the terms of the GNU General Public License as published by
12 ## the Free Software Foundation; either version 2 of the License, or
13 ## (at your option) any later version.
15 ## This program is distributed in the hope that it will be useful,
16 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
17 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 ## GNU General Public License for more details.
20 ## You should have received a copy of the GNU General Public License
21 ## along with this program; if not, write to the Free Software
22 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 uses USE_FALLBACK_IMAGE
30 uses HAVE_FALLBACK_BOOT
33 uses HAVE_OPTION_TABLE
35 uses CONFIG_MAX_PHYSICAL_CPUS
36 uses CONFIG_LOGICAL_CPUS
44 uses ROM_SECTION_OFFSET
45 uses CONFIG_ROM_STREAM
46 uses CONFIG_ROM_STREAM_START
47 uses CONFIG_COMPRESSED_ROM_STREAM_LZMA
55 uses LB_CKS_RANGE_START
58 uses MAINBOARD_PART_NUMBER
61 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
62 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
63 uses LINUXBIOS_EXTRA_VERSION
68 uses DEFAULT_CONSOLE_LOGLEVEL
69 uses MAXIMUM_CONSOLE_LOGLEVEL
70 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
71 uses CONFIG_CONSOLE_SERIAL8250
80 uses CONFIG_CONSOLE_VGA
81 uses CONFIG_PCI_ROM_RUN
82 uses HW_MEM_HOLE_SIZEK
83 uses HW_MEM_HOLE_SIZE_AUTO_INC
84 uses K8_HT_FREQ_1G_SUPPORT
86 uses HT_CHAIN_UNITID_BASE
87 uses HT_CHAIN_END_UNITID_BASE
88 uses SB_HT_CHAIN_ON_BUS0
89 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
94 uses DCACHE_RAM_GLOBAL_VAR_SIZE
99 uses ENABLE_APIC_EXT_ID
101 uses LIFT_BSP_APIC_ID
103 uses CONFIG_PCI_64BIT_PREF_MEM
105 uses CONFIG_LB_MEM_TOPK
113 ## ROM_SIZE is the size of boot ROM that this board will use.
115 default ROM_SIZE=524288
118 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
120 #default FALLBACK_SIZE=131072
122 default FALLBACK_SIZE=0x40000
125 default CONFIG_LB_MEM_TOPK=2048
128 ## Build code for the fallback boot
130 default HAVE_FALLBACK_BOOT=1
133 ## Build code to reset the motherboard from linuxBIOS
135 default HAVE_HARD_RESET=1
138 ## Build code to export a programmable irq routing table
140 default HAVE_PIRQ_TABLE=1
141 default IRQ_SLOT_COUNT=11
144 ## Build code to export an x86 MP table
145 ## Useful for specifying IRQ routing values
147 default HAVE_MP_TABLE=1
149 ## ACPI tables will be included
150 #default HAVE_ACPI_TABLES=1
152 #default ACPI_SSDTX_NUM=1
155 ## Build code to export a CMOS option table
157 default HAVE_OPTION_TABLE=1
160 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
162 default LB_CKS_RANGE_START=49
163 default LB_CKS_RANGE_END=122
164 default LB_CKS_LOC=123
167 ## Build code for SMP support
168 ## Only worry about 2 micro processors
171 default CONFIG_MAX_CPUS=4
172 default CONFIG_MAX_PHYSICAL_CPUS=2
173 default CONFIG_LOGICAL_CPUS=1
175 default SERIAL_CPU_INIT=0
177 default ENABLE_APIC_EXT_ID=0
178 default APIC_ID_OFFSET=0x8
179 default LIFT_BSP_APIC_ID=1
182 default CONFIG_CHIP_NAME=1
184 #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead.
186 #default HW_MEM_HOLE_SIZEK=0x200000
188 default HW_MEM_HOLE_SIZEK=0x100000
190 #default HW_MEM_HOLE_SIZEK=0x80000
192 #make auto increase hole size to avoid hole_startk equal to basek so as to make some kernel happy
193 #default HW_MEM_HOLE_SIZE_AUTO_INC=1
195 #Opteron K8 1G HT Support
196 default K8_HT_FREQ_1G_SUPPORT=1
199 default CONFIG_CONSOLE_VGA=1
200 default CONFIG_PCI_ROM_RUN=1
202 #HT Unit ID offset, default is 1, the typical one
203 default HT_CHAIN_UNITID_BASE=0x06
205 #real SB Unit ID, default is 0x20, mean dont touch it at last
206 default HT_CHAIN_END_UNITID_BASE=0x01
208 #make the SB HT chain on bus 0, default is not (0)
209 default SB_HT_CHAIN_ON_BUS0=2
211 #only offset for SB chain?, default is yes(1)
212 #default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
214 #allow capable device use that above 4G
215 #default CONFIG_PCI_64BIT_PREF_MEM=1
218 ## enable CACHE_AS_RAM specifics
220 default USE_DCACHE_RAM=1
221 default DCACHE_RAM_BASE=0xcc000
222 default DCACHE_RAM_SIZE=0x04000
223 default DCACHE_RAM_GLOBAL_VAR_SIZE=0x01000
224 default CONFIG_USE_INIT=0
227 ## Build code to setup a generic IOAPIC
229 default CONFIG_IOAPIC=1
232 ## Clean up the motherboard id strings
234 default MAINBOARD_PART_NUMBER="MS9185"
235 default MAINBOARD_VENDOR="MSI"
236 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1022
237 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2b80
240 ### LinuxBIOS layout values
243 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
244 default ROM_IMAGE_SIZE = 65536
247 ## Use a small 8K stack
249 default STACK_SIZE=0x2000
252 ## Use a small 32K heap
254 default HEAP_SIZE=0x8000
257 ## Only use the option table in a normal image
259 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
262 ## LinuxBIOS C code runs at this location in RAM
264 default _RAMBASE=0x00100000
267 ## Load the payload from the ROM
269 default CONFIG_ROM_STREAM = 1
272 ### Defaults of options that you may want to override in the target config file
276 ## The default compiler
278 default CC="$(CROSS_COMPILE)gcc -m32"
282 ## Disable the gdb stub by default
284 default CONFIG_GDB_STUB=0
287 ## The Serial Console
290 # To Enable the Serial Console
291 default CONFIG_CONSOLE_SERIAL8250=1
293 ## Select the serial console baud rate
294 default TTYS0_BAUD=115200
295 #default TTYS0_BAUD=57600
296 #default TTYS0_BAUD=38400
297 #default TTYS0_BAUD=19200
298 #default TTYS0_BAUD=9600
299 #default TTYS0_BAUD=4800
300 #default TTYS0_BAUD=2400
301 #default TTYS0_BAUD=1200
303 # Select the serial console base port
304 default TTYS0_BASE=0x3f8
306 # Select the serial protocol
307 # This defaults to 8 data bits, 1 stop bit, and no parity
308 default TTYS0_LCS=0x3
311 ### Select the linuxBIOS loglevel
313 ## EMERG 1 system is unusable
314 ## ALERT 2 action must be taken immediately
315 ## CRIT 3 critical conditions
316 ## ERR 4 error conditions
317 ## WARNING 5 warning conditions
318 ## NOTICE 6 normal but significant condition
319 ## INFO 7 informational
320 ## DEBUG 8 debug-level messages
321 ## SPEW 9 Way too many details
323 ## Request this level of debugging output
324 default DEFAULT_CONSOLE_LOGLEVEL=8
325 ## At a maximum only compile in this level of debugging
326 default MAXIMUM_CONSOLE_LOGLEVEL=8
329 ## Select power on after power fail setting
330 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"