2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 AMD
5 * (Written by Yinghai Lu <yinghailu@amd.com> for AMD)
6 * Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de>
7 * (Thanks to LSRA University of Mannheim for their support)
8 * Copyright (C) 2008 Jonathan A. Kollasch <jakllsch@kollasch.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
25 /* Documentation at: http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM */
27 /* This is probably not right, feel free to fix this if you don't want
31 #include <console/console.h>
32 #include <device/pci.h>
35 #include <arch/pirq_routing.h>
36 #include <cpu/amd/amdk8_sysconf.h>
38 extern unsigned char bus_isa;
39 extern unsigned char bus_ck804[6];
40 extern void get_bus_conf(void);
43 * Add one line to IRQ table.
45 static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
46 uint8_t devfn, uint8_t link0, uint16_t bitmap0,
47 uint8_t link1, uint16_t bitmap1, uint8_t link2,
48 uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
49 uint8_t slot, uint8_t rfu)
52 pirq_info->devfn = devfn;
53 pirq_info->irq[0].link = link0;
54 pirq_info->irq[0].bitmap = bitmap0;
55 pirq_info->irq[1].link = link1;
56 pirq_info->irq[1].bitmap = bitmap1;
57 pirq_info->irq[2].link = link2;
58 pirq_info->irq[2].bitmap = bitmap2;
59 pirq_info->irq[3].link = link3;
60 pirq_info->irq[3].bitmap = bitmap3;
61 pirq_info->slot = slot;
65 void pci_assign_irqs(unsigned, unsigned, const unsigned char *);
68 * Create the IRQ routing table.
69 * Values are derived from getpir generated code.
71 unsigned long write_pirq_routing_table(unsigned long addr)
74 struct irq_routing_table *pirq;
75 struct irq_info *pirq_info;
83 /* get_bus_conf() will find out all bus num and apic that share with
84 * mptable.c and mptable.c
89 /* Align the table to be 16 byte aligned. */
93 /* This table must be betweeen 0xf0000 & 0x100000 */
94 printk_info("Writing IRQ routing tables to 0x%x...", addr);
96 pirq = (void *)(addr);
97 v = (uint8_t *) (addr);
99 pirq->signature = PIRQ_SIGNATURE;
100 pirq->version = PIRQ_VERSION;
102 pirq->rtr_bus = bus_ck804[0];
103 pirq->rtr_devfn = ((sbdn + 9) << 3) | 0;
105 pirq->exclusive_irqs = 0x828;
107 pirq->rtr_vendor = 0x10de;
108 pirq->rtr_device = 0x005c;
110 pirq->miniport_data = 0;
112 memset(pirq->rfu, 0, sizeof(pirq->rfu));
114 pirq_info = (void *)(&pirq->checksum + 1);
118 write_pirq_info(pirq_info, bus_ck804[1], (0 << 3) | 0, 0x3, 0xdeb8, 0x4,
119 0xdeb8, 0x1, 0xdeb8, 0x2, 0xdeb8, 4, 0);
124 write_pirq_info(pirq_info, bus_ck804[2], (0 << 3) | 0, 0x4, 0xdeb8, 0x1,
125 0xdeb8, 0x2, 0xdeb8, 0x3, 0xdeb8, 5, 0);
130 write_pirq_info(pirq_info, bus_ck804[3], (0 << 3) | 0, 0x1, 0xdeb8, 0x2,
131 0xdeb8, 0x3, 0xdeb8, 0x4, 0xdeb8, 6, 0);
136 write_pirq_info(pirq_info, bus_ck804[4], (0x4 << 3) | 0,
137 0x2, 0xdeb8, 0x3, 0xdeb8, 0x4, 0xdeb8, 0x1, 0xdeb8,
143 for (i = 0; i < 3; i++) {
144 write_pirq_info(pirq_info, bus_ck804[5], (0 << (6 + i)) | 0,
145 ((i + 0) % 4) + 1, 0xdeb8,
146 ((i + 1) % 4) + 1, 0xdeb8,
147 ((i + 2) % 4) + 1, 0xdeb8,
148 ((i + 3) % 4) + 1, 0xdeb8, i, 0);
154 write_pirq_info(pirq_info, bus_ck804[0], ((sbdn + 9) << 3) | 0, 0x1,
155 0xdeb8, 0x2, 0xdeb8, 0x3, 0xdeb8, 0x4, 0xdeb8, 0, 0);
160 write_pirq_info(pirq_info, bus_ck804[0], ((sbdn + 1) << 3) | 0, 0x2,
161 0xdeb8, 0, 0, 0, 0, 0, 0, 0, 0);
166 write_pirq_info(pirq_info, bus_ck804[0], ((sbdn + 2) << 3) | 0, 0x1,
167 0xdeb8, 0x2, 0xdeb8, 0, 0, 0, 0, 0, 0);
172 write_pirq_info(pirq_info, bus_ck804[0], ((sbdn + 4) << 3) | 0, 0x1,
173 0xdeb8, 0, 0, 0, 0, 0, 0, 0, 0);
177 write_pirq_info(pirq_info, bus_ck804[0], ((sbdn + 7) << 3) | 0, 0x1,
178 0xdeb8, 0, 0, 0, 0, 0, 0, 0, 0);
182 write_pirq_info(pirq_info, bus_ck804[0], ((sbdn + 8) << 3) | 0, 0x1,
183 0xdeb8, 0, 0, 0, 0, 0, 0, 0, 0);
187 write_pirq_info(pirq_info, bus_ck804[0], ((sbdn + 0xa) << 3) | 0, 0x1,
188 0xdeb8, 0, 0, 0, 0, 0, 0, 0, 0);
192 pirq->size = 32 + 16 * slot_num;
194 for (i = 0; i < pirq->size; i++)
197 sum = pirq->checksum - sum;
199 if (sum != pirq->checksum) {
200 pirq->checksum = sum;
203 printk_info("done.\n");
206 unsigned char irq[4];
212 /* Bus, device, slots IRQs for {A,B,C,D}. */
214 irq[0] = 10; /* SMBus */ /* test me */
215 pci_assign_irqs(bus_ck804[0], 1, irq);
217 irq[0] = 10; /* USB */
219 pci_assign_irqs(bus_ck804[0], 2, irq);
221 irq[0] = 10; /* AC97 */
223 pci_assign_irqs(bus_ck804[0], 4, irq);
225 irq[0] = 11; /* SATA */
226 pci_assign_irqs(bus_ck804[0], 7, irq);
228 irq[0] = 5; /* SATA */
229 pci_assign_irqs(bus_ck804[0], 8, irq);
231 irq[0] = 10; /* Ethernet */
232 pci_assign_irqs(bus_ck804[0], 10, irq);
237 irq[0] = 5; /* PCI E1 - x1 */
238 pci_assign_irqs(bus_ck804[2], 0, irq);
240 irq[0] = 11; /* PCI E2 - x16 */
241 pci_assign_irqs(bus_ck804[3], 0, irq);
243 /* AGP-on-PCI "AGR" ignored */
245 irq[0] = 10; /* PCI1 */
249 pci_assign_irqs(bus_ck804[1], 7, irq);
251 irq[0] = 11; /* PCI2 */
255 pci_assign_irqs(bus_ck804[1], 8, irq);
257 irq[0] = 5; /* PCI3 */
261 pci_assign_irqs(bus_ck804[1], 9, irq);
264 return (unsigned long)pirq_info;