2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 AMD
5 * (Written by Yinghai Lu <yinghailu@amd.com> for AMD)
6 * Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de>
7 * (Thanks to LSRA University of Mannheim for their support)
8 * Copyright (C) 2008 Jonathan A. Kollasch <jakllsch@kollasch.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
25 #include <console/console.h>
26 #include <device/pci.h>
27 #include <device/pci_ids.h>
30 #if CONFIG_LOGICAL_CPUS == 1
31 #include <cpu/amd/dualcore.h>
34 #include <cpu/amd/amdk8_sysconf.h>
37 /* Global variables for MB layouts and these will be shared by irqtable,
38 * mptable and acpi_tables.
40 /* busnum is default */
41 unsigned char bus_isa;
42 unsigned char bus_ck804[6];
43 unsigned apicid_ck804;
45 unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
46 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
47 0x0000ff0, //no HTIO for ms7135
49 unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
50 0x20202020, //ms7135 has only one ht-chain
52 unsigned bus_type[256];
54 extern void get_sblk_pci1234(void);
56 static unsigned get_bus_conf_done = 0;
58 void get_bus_conf(void)
66 if (get_bus_conf_done == 1)
67 return; //do it only once
69 get_bus_conf_done = 1;
71 sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
72 sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
73 for (i = 0; i < sysconf.hc_possible_num; i++) {
74 sysconf.pci1234[i] = pci1234x[i];
75 sysconf.hcdn[i] = hcdnx[i];
80 sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
83 for (i = 0; i < 6; i++) {
87 for (i = 0; i < 256; i++) {
91 bus_type[0] = 1; //pci
93 bus_ck804[0] = (sysconf.pci1234[0] >> 16) & 0xff;
95 bus_type[bus_ck804[0]] = 1;
99 for (i = 1; i < 4; i++) {
101 case 1: dn = 9; break;
102 case 2: dn = 13; break;
103 case 3: dn = 14; break;
104 default: dn = -1; break;
106 dev = dev_find_slot(bus_ck804[0], PCI_DEVFN(sbdn + dn, 0));
108 bus_ck804[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
109 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
111 for (j = bus_ck804[i]; j < bus_isa; j++)
115 (BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
116 bus_ck804[0], sbdn + dn);
117 bus_isa = bus_ck804[i - 1] + 1;
121 /*I/O APICs: APIC ID Version State Address*/
122 #if CONFIG_LOGICAL_CPUS==1
123 apicid_base = get_apicid_base(3);
125 apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
127 apicid_ck804 = apicid_base + 0;