1 uses CONFIG_ISA_IO_BASE
3 uses CONFIG_ISA_MEM_BASE
4 uses CONFIG_PCIC0_CFGADDR
5 uses CONFIG_PCIC0_CFGDATA
6 uses CONFIG_PNP_CFGADDR
7 uses CONFIG_PNP_CFGDATA
10 uses CONFIG_CROSS_COMPILE
11 uses CONFIG_HAVE_OPTION_TABLE
12 uses CONFIG_SANDPOINT_ALTIMUS
14 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
16 uses CONFIG_CHIP_CONFIGURE
18 uses CONFIG_CONSOLE_SERIAL8250
19 uses CONFIG_TTYS0_BASE
21 uses CONFIG_FS_PAYLOAD
23 uses CONFIG_FS_ISO9660
25 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
26 uses CONFIG_PRECOMPRESSED_PAYLOAD
27 uses CONFIG_AUTOBOOT_CMDLINE
28 uses CONFIG_PAYLOAD_SIZE
30 uses CONFIG_ROM_IMAGE_SIZE
32 uses CONFIG_EXCEPTION_VECTORS
37 uses CONFIG_STACK_SIZE
41 uses CONFIG_MAINBOARD_VENDOR
42 uses CONFIG_MAINBOARD_PART_NUMBER
43 uses COREBOOT_EXTRA_VERSION
44 uses CONFIG_CROSS_COMPILE
52 default CONFIG_ISA_IO_BASE=0xfe000000
53 default CONFIG_ISA_MEM_BASE=0xfd000000
54 default CONFIG_PCIC0_CFGADDR=0xfec00000
55 default CONFIG_PCIC0_CFGDATA=0xfee00000
56 default CONFIG_PNP_CFGADDR=0x15c
57 default CONFIG_PNP_CFGDATA=0x15d
58 default CONFIG_IO_BASE=CONFIG_ISA_IO_BASE
61 ## The default compiler
63 default CC="$(CONFIG_CROSS_COMPILE)gcc"
65 ## use a cross compiler
66 #default CONFIG_CROSS_COMPILE="powerpc-eabi-"
67 #default CONFIG_CROSS_COMPILE="ppc_74xx-"
69 ## Use stage 1 initialization code
70 default CONFIG_USE_INIT=1
72 ## Use static configuration
73 default CONFIG_CHIP_CONFIGURE=1
75 ## We don't use compressed image
76 default CONFIG_COMPRESS=0
78 ## Turn off POST codes
79 default CONFIG_NO_POST=1
81 ## Enable serial console
82 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
83 default CONFIG_CONSOLE_SERIAL8250=1
84 default CONFIG_TTYS0_BASE=0x3f8
86 ## Load payload using filo
88 default CONFIG_FS_PAYLOAD=1
89 default CONFIG_FS_EXT2=1
90 default CONFIG_FS_ISO9660=1
91 default CONFIG_FS_FAT=1
92 default CONFIG_AUTOBOOT_CMDLINE="hdc1:/vmlinuz"
94 # coreboot must fit into 128KB
95 default CONFIG_ROM_IMAGE_SIZE=131072
96 default CONFIG_ROM_SIZE={CONFIG_ROM_IMAGE_SIZE+CONFIG_PAYLOAD_SIZE}
97 default CONFIG_PAYLOAD_SIZE=262144
99 # Set stack and heap sizes (stage 2)
100 default CONFIG_STACK_SIZE=0x10000
101 default CONFIG_HEAP_SIZE=0x10000
103 # Sandpoint Demo Board
105 default CONFIG_ROMBASE=0xfff00000
107 ## Sandpoint reset vector
108 default CONFIG_RESET=CONFIG_ROMBASE+0x100
110 ## Exception vectors (other than reset vector)
111 default CONFIG_EXCEPTION_VECTORS=CONFIG_RESET+0x100
113 ## Start of coreboot in the boot rom
114 ## = CONFIG_RESET + exeception vector table size
115 default CONFIG_ROMSTART=CONFIG_RESET+0x3100
117 ## Coreboot C code runs at this location in RAM
118 default CONFIG_RAMBASE=0x00100000
119 default CONFIG_RAMSTART=0x00100000
126 default CONFIG_CBFS=0