src/mainboard/lenovo/x60/mainboard_smi.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008-2009 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  19  * MA 02110-1301 USA
  20  */
  21
  22 #include <arch/io.h>
  23 #include <arch/romcc_io.h>
  24 #include <console/console.h>
  25 #include <cpu/x86/smm.h>
  26 #include "southbridge/intel/i82801gx/nvs.h"
  27 #include "southbridge/intel/i82801gx/i82801gx.h"
  28 #include <ec/acpi/ec.h>
  29 #include <pc80/mc146818rtc.h>
  30 #include <ec/lenovo/h8/h8.h>
  31 #include "dock.h"
  32 #include "smi.h"
  33
  34 /* The southbridge SMI handler checks whether gnvs has a
  35  * valid pointer before calling the trap handler
  36  */
  37 extern global_nvs_t *gnvs;
  38
  39 static void mainboard_smm_init(void)
  40 {
  41         printk(BIOS_DEBUG, "initializing SMI\n");
  42         /* Enable 0x1600/0x1600 register pair */
  43         ec_set_bit(0x00, 0x05);
  44 }
  45
  46 static void mainboard_smi_save_cmos(void)
  47 {
  48         u8 val;
  49         u8 tmp70, tmp72, tmpcf8;
  50
  51         tmp70 = inb(0x70);
  52         tmp72 = inb(0x72);
  53         tmpcf8 = inl(0xcf8);
  54
  55         val = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4);
  56         set_option("tft_brightness", &val);
  57         val = ec_read(H8_VOLUME_CONTROL);
  58         set_option("volume", &val);
  59
  60         outb(tmp70, 0x70);
  61         outb(tmp72, 0x72);
  62         outb(tmpcf8, 0xcf8);
  63 }
  64
  65 int mainboard_io_trap_handler(int smif)
  66 {
  67         static int smm_initialized;
  68
  69         if (!smm_initialized) {
  70                 mainboard_smm_init();
  71                 smm_initialized = 1;
  72         }
  73
  74         switch (smif) {
  75         case SMI_DOCK_CONNECT:
  76                 dlpc_init();
  77                 if (!dock_connect()) {
  78                         /* set dock LED to indicate status */
  79                         ec_write(0x0c, 0x88);
  80                 } else {
  81                         /* blink dock LED to indicate failure */
  82                         ec_write(0x0c, 0xc8);
  83                 }
  84                 break;
  85
  86         case SMI_DOCK_DISCONNECT:
  87                 dock_disconnect();
  88                 ec_write(0x0c, 0x08);
  89                 break;
  90
  91         case SMI_SAVE_CMOS:
  92                 mainboard_smi_save_cmos();
  93                 break;
  94         default:
  95                 return 0;
  96         }
  97
  98         /* On success, the IO Trap Handler returns 1
  99          * On failure, the IO Trap Handler returns a value != 1 */
 100         return 1;
 101 }
 102
 103 static void mainboard_smi_brightness_up(void)
 104 {
 105         u8 value;
 106
 107         if ((value = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4)) < 0xf0)
 108                 pci_write_config8(PCI_DEV(0, 2, 1), 0xf4, (value + 0x10) | 0xf);
 109 }
 110
 111 static void mainboard_smi_brightness_down(void)
 112 {
 113         u8 value;
 114
 115         if ((value = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4)) > 0x10)
 116                 pci_write_config8(PCI_DEV(0, 2, 1), 0xf4, (value - 0x10) & 0xf0);
 117 }
 118
 119 static void mainboard_smi_handle_ec_sci(void)
 120 {
 121         u8 status = inb(EC_SC);
 122         u8 event;
 123
 124         if (!(status & EC_SCI_EVT))
 125                 return;
 126
 127         event = ec_query();
 128         printk(BIOS_DEBUG, "EC event %02x\n", event);
 129
 130         switch(event) {
 131                 /* brightness up */
 132                 case 0x14:
 133                         mainboard_smi_brightness_up();
 134                         mainboard_smi_save_cmos();
 135                         break;
 136                 /* brightness down */
 137                 case 0x15:
 138                         mainboard_smi_brightness_down();
 139                         mainboard_smi_save_cmos();
 140                         break;
 141                 default:
 142                         break;
 143         }
 144 }
 145
 146 void mainboard_smi_gpi(u16 gpi)
 147 {
 148         if (gpi & (1 << 12))
 149                 mainboard_smi_handle_ec_sci();
 150 }
 151
 152 int mainboard_apm_cnt(u8 data)
 153 {
 154         u16 pmbase = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0x40) & 0xfffc;
 155         u8 tmp;
 156
 157         printk(BIOS_DEBUG, "%s: pmbase %04X, data %02X\n", __func__, pmbase, data);
 158
 159         if (!pmbase)
 160                 return 0;
 161
 162         switch(data) {
 163                 case APM_CNT_ACPI_ENABLE:
 164                         /* use 0x1600/0x1604 to prevent races with userspace */
 165                         ec_set_ports(0x1604, 0x1600);
 166                         /* route H8SCI to SCI */
 167                         outw(inw(ALT_GP_SMI_EN) & ~0x1000, pmbase + ALT_GP_SMI_EN);
 168                         tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
 169                         tmp &= ~0x03;
 170                         tmp |= 0x02;
 171                         pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
 172                         /* discard all events, and enable attention */
 173                         ec_write(0x80, 0x01);
 174                         break;
 175                 case APM_CNT_ACPI_DISABLE:
 176                         /* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
 177                            provide a EC query function */
 178                         ec_set_ports(0x66, 0x62);
 179                         /* route H8SCI# to SMI */
 180                         outw(inw(pmbase + ALT_GP_SMI_EN) | 0x1000, pmbase + ALT_GP_SMI_EN);
 181                         tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
 182                         tmp &= ~0x03;
 183                         tmp |= 0x01;
 184                         pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
 185                         /* discard all events, and enable attention */
 186                         ec_write(0x80, 0x01);
 187                         break;
 188                 default:
 189                         break;
 190         }
 191         return 0;
 192 }