src/mainboard/lenovo/x60/mainboard_smi.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008-2009 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  19  * MA 02110-1301 USA
  20  */
  21
  22 #include <arch/io.h>
  23 #include <arch/romcc_io.h>
  24 #include <console/console.h>
  25 #include <cpu/x86/smm.h>
  26 #include "southbridge/intel/i82801gx/nvs.h"
  27 #include "southbridge/intel/i82801gx/i82801gx.h"
  28 #include <ec/acpi/ec.h>
  29 #include <pc80/mc146818rtc.h>
  30 #include <ec/lenovo/h8/h8.h>
  31 #include <delay.h>
  32 #include "dock.h"
  33 #include "smi.h"
  34
  35 /* The southbridge SMI handler checks whether gnvs has a
  36  * valid pointer before calling the trap handler
  37  */
  38 extern global_nvs_t *gnvs;
  39
  40 static void mainboard_smm_init(void)
  41 {
  42         printk(BIOS_DEBUG, "initializing SMI\n");
  43         /* Enable 0x1600/0x1600 register pair */
  44         ec_set_bit(0x00, 0x05);
  45 }
  46
  47 static void mainboard_smi_save_cmos(void)
  48 {
  49         u8 val;
  50         u8 tmp70, tmp72;
  51
  52         tmp70 = inb(0x70);
  53         tmp72 = inb(0x72);
  54
  55         val = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4);
  56         set_option("tft_brightness", &val);
  57         val = ec_read(H8_VOLUME_CONTROL);
  58         set_option("volume", &val);
  59
  60         outb(tmp70, 0x70);
  61         outb(tmp72, 0x72);
  62 }
  63
  64 int mainboard_io_trap_handler(int smif)
  65 {
  66         static int smm_initialized;
  67
  68         if (!smm_initialized) {
  69                 mainboard_smm_init();
  70                 smm_initialized = 1;
  71         }
  72
  73         switch (smif) {
  74         case SMI_DOCK_CONNECT:
  75                 ec_clr_bit(0x03, 2);
  76                 udelay(250000);
  77                 if (!dock_connect()) {
  78                         ec_set_bit(0x03, 2);
  79                         /* set dock LED to indicate status */
  80                         ec_write(0x0c, 0x09);
  81                         ec_write(0x0c, 0x88);
  82                 } else {
  83                         /* blink dock LED to indicate failure */
  84                         ec_write(0x0c, 0x08);
  85                         ec_write(0x0c, 0xc9);
  86                 }
  87                 break;
  88
  89         case SMI_DOCK_DISCONNECT:
  90                 ec_clr_bit(0x03, 2);
  91                 dock_disconnect();
  92                 break;
  93
  94         case SMI_SAVE_CMOS:
  95                 mainboard_smi_save_cmos();
  96                 break;
  97         default:
  98                 return 0;
  99         }
 100
 101         /* On success, the IO Trap Handler returns 1
 102          * On failure, the IO Trap Handler returns a value != 1 */
 103         return 1;
 104 }
 105
 106 static void mainboard_smi_brightness_up(void)
 107 {
 108         u8 value;
 109
 110         if ((value = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4)) < 0xf0)
 111                 pci_write_config8(PCI_DEV(0, 2, 1), 0xf4, (value + 0x10) | 0xf);
 112 }
 113
 114 static void mainboard_smi_brightness_down(void)
 115 {
 116         u8 value;
 117
 118         if ((value = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4)) > 0x10)
 119                 pci_write_config8(PCI_DEV(0, 2, 1), 0xf4, (value - 0x10) & 0xf0);
 120 }
 121
 122 static void mainboard_smi_handle_ec_sci(void)
 123 {
 124         u8 status = inb(EC_SC);
 125         u8 event;
 126
 127         if (!(status & EC_SCI_EVT))
 128                 return;
 129
 130         event = ec_query();
 131         printk(BIOS_DEBUG, "EC event %02x\n", event);
 132
 133         switch(event) {
 134                 /* brightness up */
 135                 case 0x14:
 136                         mainboard_smi_brightness_up();
 137                         mainboard_smi_save_cmos();
 138                         break;
 139                 /* brightness down */
 140                 case 0x15:
 141                         mainboard_smi_brightness_down();
 142                         mainboard_smi_save_cmos();
 143                         break;
 144                         /* Fn-F9 key */
 145                 case 0x18:
 146                         /* Power loss */
 147                 case 0x27:
 148                         /* Undock Key */
 149                 case 0x50:
 150                         mainboard_io_trap_handler(SMI_DOCK_DISCONNECT);
 151                         break;
 152                         /* Dock Event */
 153                 case 0x37:
 154                 case 0x58:
 155                         mainboard_io_trap_handler(SMI_DOCK_CONNECT);
 156                         break;
 157                 default:
 158                         break;
 159         }
 160 }
 161
 162 void mainboard_smi_gpi(u16 gpi)
 163 {
 164         if (gpi & (1 << 12))
 165                 mainboard_smi_handle_ec_sci();
 166 }
 167
 168 int mainboard_apm_cnt(u8 data)
 169 {
 170         u16 pmbase = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0x40) & 0xfffc;
 171         u8 tmp;
 172
 173         printk(BIOS_DEBUG, "%s: pmbase %04X, data %02X\n", __func__, pmbase, data);
 174
 175         if (!pmbase)
 176                 return 0;
 177
 178         switch(data) {
 179                 case APM_CNT_ACPI_ENABLE:
 180                         /* use 0x1600/0x1604 to prevent races with userspace */
 181                         ec_set_ports(0x1604, 0x1600);
 182                         /* route H8SCI to SCI */
 183                         outw(inw(ALT_GP_SMI_EN) & ~0x1000, pmbase + ALT_GP_SMI_EN);
 184                         tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
 185                         tmp &= ~0x03;
 186                         tmp |= 0x02;
 187                         pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
 188                         /* discard all events, and enable attention */
 189                         ec_write(0x80, 0x01);
 190                         break;
 191                 case APM_CNT_ACPI_DISABLE:
 192                         /* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
 193                            provide a EC query function */
 194                         ec_set_ports(0x66, 0x62);
 195                         /* route H8SCI# to SMI */
 196                         outw(inw(pmbase + ALT_GP_SMI_EN) | 0x1000, pmbase + ALT_GP_SMI_EN);
 197                         tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
 198                         tmp &= ~0x03;
 199                         tmp |= 0x01;
 200                         pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
 201                         /* discard all events, and enable attention */
 202                         ec_write(0x80, 0x01);
 203                         break;
 204                 default:
 205                         break;
 206         }
 207         return 0;
 208 }