src/mainboard/lenovo/x60/mainboard_smi.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008-2009 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  19  * MA 02110-1301 USA
  20  */
  21
  22 #include <arch/io.h>
  23 #include <arch/romcc_io.h>
  24 #include <console/console.h>
  25 #include <cpu/x86/smm.h>
  26 #include "southbridge/intel/i82801gx/nvs.h"
  27 #include "southbridge/intel/i82801gx/i82801gx.h"
  28 #include <ec/acpi/ec.h>
  29 #include <pc80/mc146818rtc.h>
  30 #include <ec/lenovo/h8/h8.h>
  31 #include "dock.h"
  32 #include "smi.h"
  33
  34 /* The southbridge SMI handler checks whether gnvs has a
  35  * valid pointer before calling the trap handler
  36  */
  37 extern global_nvs_t *gnvs;
  38
  39 static void mainboard_smm_init(void)
  40 {
  41         printk(BIOS_DEBUG, "initializing SMI\n");
  42         /* Enable 0x1600/0x1600 register pair */
  43         ec_set_bit(0x00, 0x05);
  44 }
  45
  46 static void mainboard_smi_save_cmos(void)
  47 {
  48         u8 val;
  49         u8 tmp70, tmp72;
  50
  51         tmp70 = inb(0x70);
  52         tmp72 = inb(0x72);
  53
  54         val = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4);
  55         set_option("tft_brightness", &val);
  56         val = ec_read(H8_VOLUME_CONTROL);
  57         set_option("volume", &val);
  58
  59         outb(tmp70, 0x70);
  60         outb(tmp72, 0x72);
  61 }
  62
  63 int mainboard_io_trap_handler(int smif)
  64 {
  65         static int smm_initialized;
  66
  67         if (!smm_initialized) {
  68                 mainboard_smm_init();
  69                 smm_initialized = 1;
  70         }
  71
  72         switch (smif) {
  73         case SMI_DOCK_CONNECT:
  74                 dlpc_init();
  75                 if (!dock_connect()) {
  76                         /* set dock LED to indicate status */
  77                         ec_write(0x0c, 0x88);
  78                 } else {
  79                         /* blink dock LED to indicate failure */
  80                         ec_write(0x0c, 0xc8);
  81                 }
  82                 break;
  83
  84         case SMI_DOCK_DISCONNECT:
  85                 dock_disconnect();
  86                 ec_write(0x0c, 0x08);
  87                 break;
  88
  89         case SMI_SAVE_CMOS:
  90                 mainboard_smi_save_cmos();
  91                 break;
  92         default:
  93                 return 0;
  94         }
  95
  96         /* On success, the IO Trap Handler returns 1
  97          * On failure, the IO Trap Handler returns a value != 1 */
  98         return 1;
  99 }
 100
 101 static void mainboard_smi_brightness_up(void)
 102 {
 103         u8 value;
 104
 105         if ((value = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4)) < 0xf0)
 106                 pci_write_config8(PCI_DEV(0, 2, 1), 0xf4, (value + 0x10) | 0xf);
 107 }
 108
 109 static void mainboard_smi_brightness_down(void)
 110 {
 111         u8 value;
 112
 113         if ((value = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4)) > 0x10)
 114                 pci_write_config8(PCI_DEV(0, 2, 1), 0xf4, (value - 0x10) & 0xf0);
 115 }
 116
 117 static void mainboard_smi_handle_ec_sci(void)
 118 {
 119         u8 status = inb(EC_SC);
 120         u8 event;
 121
 122         if (!(status & EC_SCI_EVT))
 123                 return;
 124
 125         event = ec_query();
 126         printk(BIOS_DEBUG, "EC event %02x\n", event);
 127
 128         switch(event) {
 129                 /* brightness up */
 130                 case 0x14:
 131                         mainboard_smi_brightness_up();
 132                         mainboard_smi_save_cmos();
 133                         break;
 134                 /* brightness down */
 135                 case 0x15:
 136                         mainboard_smi_brightness_down();
 137                         mainboard_smi_save_cmos();
 138                         break;
 139                 default:
 140                         break;
 141         }
 142 }
 143
 144 void mainboard_smi_gpi(u16 gpi)
 145 {
 146         if (gpi & (1 << 12))
 147                 mainboard_smi_handle_ec_sci();
 148 }
 149
 150 int mainboard_apm_cnt(u8 data)
 151 {
 152         u16 pmbase = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0x40) & 0xfffc;
 153         u8 tmp;
 154
 155         printk(BIOS_DEBUG, "%s: pmbase %04X, data %02X\n", __func__, pmbase, data);
 156
 157         if (!pmbase)
 158                 return 0;
 159
 160         switch(data) {
 161                 case APM_CNT_ACPI_ENABLE:
 162                         /* use 0x1600/0x1604 to prevent races with userspace */
 163                         ec_set_ports(0x1604, 0x1600);
 164                         /* route H8SCI to SCI */
 165                         outw(inw(ALT_GP_SMI_EN) & ~0x1000, pmbase + ALT_GP_SMI_EN);
 166                         tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
 167                         tmp &= ~0x03;
 168                         tmp |= 0x02;
 169                         pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
 170                         /* discard all events, and enable attention */
 171                         ec_write(0x80, 0x01);
 172                         break;
 173                 case APM_CNT_ACPI_DISABLE:
 174                         /* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
 175                            provide a EC query function */
 176                         ec_set_ports(0x66, 0x62);
 177                         /* route H8SCI# to SMI */
 178                         outw(inw(pmbase + ALT_GP_SMI_EN) | 0x1000, pmbase + ALT_GP_SMI_EN);
 179                         tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
 180                         tmp &= ~0x03;
 181                         tmp |= 0x01;
 182                         pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
 183                         /* discard all events, and enable attention */
 184                         ec_write(0x80, 0x01);
 185                         break;
 186                 default:
 187                         break;
 188         }
 189         return 0;
 190 }