2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2007-2009 coresystems GmbH
5 ## Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
7 ## This program is free software; you can redistribute it and/or
8 ## modify it under the terms of the GNU General Public License as
9 ## published by the Free Software Foundation; version 2 of
12 ## This program is distributed in the hope that it will be useful,
13 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
14 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 ## GNU General Public License for more details.
17 ## You should have received a copy of the GNU General Public License
18 ## along with this program; if not, write to the Free Software
19 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
23 chip northbridge/intel/i945
25 device lapic_cluster 0 on
26 chip cpu/intel/socket_mFCPGA478
31 device pci_domain 0 on
32 device pci 00.0 on # Host bridge
33 subsystemid 0x17aa 0x2017
35 device pci 02.0 on # VGA controller
36 subsystemid 0x17aa 0x201a
38 device pci 02.1 on # display controller
39 subsystemid 0x17aa 0x201a
41 chip southbridge/intel/i82801gx
42 register "pirqa_routing" = "0x0b"
43 register "pirqb_routing" = "0x0b"
44 register "pirqc_routing" = "0x0b"
45 register "pirqd_routing" = "0x0b"
46 register "pirqe_routing" = "0x0b"
47 register "pirqf_routing" = "0x0b"
48 register "pirqg_routing" = "0x0b"
49 register "pirqh_routing" = "0x0b"
52 # 0 No effect (default)
53 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
54 # 2 SCI (if corresponding GPIO_EN bit is also set)
55 register "gpi13_routing" = "2"
56 register "gpi12_routing" = "1"
57 register "gpi8_routing" = "2"
59 register "sata_ahci" = "0x0"
61 register "gpe0_en" = "0x11000006"
62 register "alt_gp_smi_en" = "0x1000"
64 register "c4onc3_enable" = "1"
65 device pci 1b.0 on # Audio Cnotroller
66 subsystemid 0x17aa 0x2010
68 device pci 1c.0 on end # Ethernet
69 device pci 1c.1 on end # Atheros WLAN
70 device pci 1d.0 on # USB UHCI
71 subsystemid 0x17aa 0x200a
73 device pci 1d.1 on # USB UHCI
74 subsystemid 0x17aa 0x200a
76 device pci 1d.2 on # USB UHCI
77 subsystemid 0x17aa 0x200a
79 device pci 1d.3 on # USB UHCI
80 subsystemid 0x17aa 0x200a
82 device pci 1d.7 on # USB2 EHCI
83 subsystemid 0x17aa 0x200b
85 device pci 1f.0 on # PCI-LPC bridge
86 subsystemid 0x17aa 0x2009
88 device pnp ff.1 on # dummy
90 register "backlight_enable" = "0x01"
91 register "dock_event_enable" = "0x01"
94 device pnp ff.2 on # dummy
101 register "config0" = "0xa6"
102 register "config1" = "0x05"
103 register "config2" = "0xa0"
104 register "config3" = "0x01"
106 register "beepmask0" = "0xfe"
107 register "beepmask1" = "0x96"
109 register "event2_enable" = "0xff"
110 register "event3_enable" = "0xff"
111 register "event4_enable" = "0xf4"
112 register "event5_enable" = "0x3c"
113 register "event6_enable" = "0x80"
114 register "event7_enable" = "0x01"
115 register "eventc_enable" = "0x3c"
116 register "event8_enable" = "0x01"
117 register "event9_enable" = "0xff"
118 register "eventa_enable" = "0xff"
119 register "eventb_enable" = "0xff"
120 register "eventc_enable" = "0xff"
121 register "eventd_enable" = "0xff"
123 register "wlan_enable" = "0x01"
124 register "trackpoint_enable" = "0x03"
126 chip superio/nsc/pc87382
127 device pnp 164e.2 on # IR
131 device pnp 164e.3 off # Serial Port
135 device pnp 164e.7 on # GPIO
139 device pnp 164e.19 on # DLPC
144 chip superio/nsc/pc87392
145 device pnp 2e.0 off #FDC
148 device pnp 2e.1 on # Parallel Port
153 device pnp 2e.2 off # Serial Port / IR
158 device pnp 2e.3 on # Serial Port
163 device pnp 2e.7 on # GPIO
167 device pnp 2e.a off # WDT
171 device pci 1f.1 on # IDE
172 subsystemid 0x17aa 0x200c
174 device pci 1f.2 on # SATA
175 subsystemid 0x17aa 0x200d
177 device pci 1f.3 on # SMBUS
178 subsystemid 0x17aa 0x200f
179 chip drivers/ics/954309
180 register "reg0" = "0x2e"
181 register "reg1" = "0xf7"
182 register "reg2" = "0x3c"
183 register "reg3" = "0x20"
184 register "reg4" = "0x01"
185 register "reg5" = "0x00"
186 register "reg6" = "0x1b"
187 register "reg7" = "0x01"
188 register "reg8" = "0x54"
189 register "reg9" = "0xff"
190 register "reg10" = "0xff"
191 register "reg11" = "0x07"
197 chip southbridge/ricoh/rl5c476