2 * This file is part of the coreboot project.
4 * Copyright (C) 2007-2009 coresystems GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 /* This is board specific information: IRQ routing for the
23 * 0:1e.0 PCI bridge of the ICH7
28 // PCI Slot 1 routes ????
29 Package() { 0x0000ffff, 0, 0, 21},
30 Package() { 0x0000ffff, 1, 0, 22},
31 Package() { 0x0000ffff, 2, 0, 23},
32 Package() { 0x0000ffff, 3, 0, 20},
34 // PCI Slot 2 routes ????
35 Package() { 0x0001ffff, 0, 0, 22},
36 Package() { 0x0001ffff, 1, 0, 21},
37 Package() { 0x0001ffff, 2, 0, 20},
38 Package() { 0x0001ffff, 3, 0, 23},
40 // PCI Slot 3 routes ????
41 Package() { 0x0002ffff, 0, 0, 18},
42 Package() { 0x0002ffff, 1, 0, 19},
43 Package() { 0x0002ffff, 2, 0, 17},
44 Package() { 0x0002ffff, 3, 0, 16},
46 Package() { 0x0003ffff, 0, 0, 16},
47 Package() { 0x0003ffff, 1, 0, 17},
48 Package() { 0x0003ffff, 2, 0, 18},
49 Package() { 0x0003ffff, 3, 0, 19},
51 Package() { 0x0005ffff, 0, 0, 17},
52 Package() { 0x0005ffff, 1, 0, 20},
53 Package() { 0x0005ffff, 2, 0, 22},
54 Package() { 0x0005ffff, 3, 0, 21},
56 Package() { 0x0008ffff, 0, 0, 20},
60 // PCI Slot 1 routes FGHE
61 Package() { 0x0000ffff, 0, \_SB.PCI0.LPCB.LNKF, 0},
62 Package() { 0x0000ffff, 1, \_SB.PCI0.LPCB.LNKG, 0},
63 Package() { 0x0000ffff, 2, \_SB.PCI0.LPCB.LNKH, 0},
64 Package() { 0x0000ffff, 3, \_SB.PCI0.LPCB.LNKE, 0},
66 // PCI Slot 2 routes GFEH
67 Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKG, 0},
68 Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKF, 0},
69 Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKE, 0},
70 Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKH, 0},
72 // PCI Slot 3 routes CDBA
73 Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKC, 0},
74 Package() { 0x0002ffff, 1, \_SB.PCI0.LPCB.LNKD, 0},
75 Package() { 0x0002ffff, 2, \_SB.PCI0.LPCB.LNKB, 0},
76 Package() { 0x0002ffff, 3, \_SB.PCI0.LPCB.LNKA, 0},
78 Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKA, 0},
79 Package() { 0x0003ffff, 1, \_SB.PCI0.LPCB.LNKB, 0},
80 Package() { 0x0003ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
81 Package() { 0x0003ffff, 3, \_SB.PCI0.LPCB.LNKD, 0},
83 Package() { 0x0005ffff, 0, \_SB.PCI0.LPCB.LNKB, 0},
84 Package() { 0x0005ffff, 1, \_SB.PCI0.LPCB.LNKE, 0},
85 Package() { 0x0005ffff, 2, \_SB.PCI0.LPCB.LNKG, 0},
86 Package() { 0x0005ffff, 3, \_SB.PCI0.LPCB.LNKF, 0},
88 Package() { 0x0008ffff, 0, \_SB.PCI0.LPCB.LNKE, 0},