src/mainboard/lenovo/t60/mainboard_smi.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008-2009 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  19  * MA 02110-1301 USA
  20  */
  21
  22 #include <arch/io.h>
  23 #include <arch/romcc_io.h>
  24 #include <console/console.h>
  25 #include <cpu/x86/smm.h>
  26 #include "southbridge/intel/i82801gx/nvs.h"
  27 #include "southbridge/intel/i82801gx/i82801gx.h"
  28 #include <ec/acpi/ec.h>
  29 #include "dock.h"
  30 #include "smi.h"
  31
  32 #define LVTMA_BL_MOD_LEVEL 0x7af9 /* ATI Radeon backlight level */
  33 /* The southbridge SMI handler checks whether gnvs has a
  34  * valid pointer before calling the trap handler
  35  */
  36 extern global_nvs_t *gnvs;
  37
  38 static void mainboard_smm_init(void)
  39 {
  40         printk(BIOS_DEBUG, "initializing SMI\n");
  41         /* Enable 0x1600/0x1600 register pair */
  42         ec_set_bit(0x00, 0x05);
  43 }
  44
  45 static void mainboard_smi_brightness_down(void)
  46 {
  47         u8 *bar;
  48         if ((bar = (u8 *)pci_read_config32(PCI_DEV(1, 0, 0), 0x18))) {
  49                 printk(BIOS_DEBUG, "bar: %08X, level %02X\n",  (unsigned int)bar, *(bar+LVTMA_BL_MOD_LEVEL));
  50                 *(bar+LVTMA_BL_MOD_LEVEL) &= 0xf0;
  51                 if (*(bar+LVTMA_BL_MOD_LEVEL) > 0x10)
  52                         *(bar+LVTMA_BL_MOD_LEVEL) -= 0x10;
  53         }
  54 }
  55
  56 static void mainboard_smi_brightness_up(void)
  57 {
  58         u8 *bar;
  59         if ((bar = (u8 *)pci_read_config32(PCI_DEV(1, 0, 0), 0x18))) {
  60                 printk(BIOS_DEBUG, "bar: %08X, level %02X\n",  (unsigned int )bar, *(bar+LVTMA_BL_MOD_LEVEL));
  61                 *(bar+LVTMA_BL_MOD_LEVEL) |= 0x0f;
  62                 if (*(bar+LVTMA_BL_MOD_LEVEL) < 0xf0)
  63                         *(bar+LVTMA_BL_MOD_LEVEL) += 0x10;
  64         }
  65 }
  66
  67 int mainboard_io_trap_handler(int smif)
  68 {
  69         static int smm_initialized;
  70
  71         if (!smm_initialized) {
  72                 mainboard_smm_init();
  73                 smm_initialized = 1;
  74         }
  75
  76         switch (smif) {
  77         case SMI_DOCK_CONNECT:
  78                 dlpc_init();
  79                 if (!dock_connect()) {
  80                         /* set dock LED to indicate status */
  81                         ec_write(0x0c, 0x08);
  82                         ec_write(0x0c, 0x89);
  83                 } else {
  84                         /* blink dock LED to indicate failure */
  85                         ec_write(0x0c, 0xc8);
  86                         ec_write(0x0c, 0x09);
  87                 }
  88                 break;
  89
  90         case SMI_DOCK_DISCONNECT:
  91                 dock_disconnect();
  92                 ec_write(0x0c, 0x09);
  93                 ec_write(0x0c, 0x08);
  94                 break;
  95
  96         case SMI_BRIGHTNESS_UP:
  97                 mainboard_smi_brightness_up();
  98                 break;
  99
 100         case SMI_BRIGHTNESS_DOWN:
 101                 mainboard_smi_brightness_down();
 102                 break;
 103
 104         default:
 105                 return 0;
 106         }
 107
 108         /* On success, the IO Trap Handler returns 1
 109          * On failure, the IO Trap Handler returns a value != 1 */
 110         return 1;
 111 }
 112
 113 static void mainboard_smi_handle_ec_sci(void)
 114 {
 115         u8 status = inb(EC_SC);
 116         u8 event;
 117
 118         if (!(status & EC_SCI_EVT))
 119                 return;
 120
 121         event = ec_query();
 122         printk(BIOS_DEBUG, "EC event %02x\n", event);
 123
 124         switch(event) {
 125                 /* brightness up */
 126                 case 0x14:
 127                         mainboard_smi_brightness_up();
 128                         break;
 129                 /* brightness down */
 130                 case 0x15:
 131                         mainboard_smi_brightness_down();
 132                         break;
 133                 /* Fn-F9 Key */
 134                 case 0x18:
 135                 /* power loss */
 136                 case 0x27:
 137                 /* undock event */
 138                 case 0x50:
 139                         mainboard_io_trap_handler(SMI_DOCK_DISCONNECT);
 140                         break;
 141                 /* dock event */
 142                 case 0x37:
 143                         mainboard_io_trap_handler(SMI_DOCK_CONNECT);
 144                         break;
 145                 default:
 146                         break;
 147         }
 148 }
 149
 150 void mainboard_smi_gpi(u16 gpi)
 151 {
 152         if (gpi & (1 << 12))
 153                 mainboard_smi_handle_ec_sci();
 154 }
 155
 156 int mainboard_apm_cnt(u8 data)
 157 {
 158         u16 pmbase = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0x40) & 0xfffc;
 159         u8 tmp;
 160
 161         printk(BIOS_DEBUG, "%s: pmbase %04X, data %02X\n", __func__, pmbase, data);
 162
 163         if (!pmbase)
 164                 return 0;
 165
 166         switch(data) {
 167                 case APM_CNT_ACPI_ENABLE:
 168                         /* use 0x1600/0x1604 to prevent races with userspace */
 169                         ec_set_ports(0x1604, 0x1600);
 170                         /* route H8SCI to SCI */
 171                         outw(inw(ALT_GP_SMI_EN) & ~0x1000, pmbase + ALT_GP_SMI_EN);
 172                         tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
 173                         tmp &= ~0x03;
 174                         tmp |= 0x02;
 175                         pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
 176                         break;
 177                 case APM_CNT_ACPI_DISABLE:
 178                         /* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
 179                            provide a EC query function */
 180                         ec_set_ports(0x66, 0x62);
 181                         /* route H8SCI# to SMI */
 182                         outw(inw(pmbase + ALT_GP_SMI_EN) | 0x1000, pmbase + ALT_GP_SMI_EN);
 183                         tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
 184                         tmp &= ~0x03;
 185                         tmp |= 0x01;
 186                         pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
 187                         break;
 188                 default:
 189                         break;
 190         }
 191         return 0;
 192 }
 193