2 * This file is part of the coreboot project.
4 * Copyright (C) 2007-2009 coresystems GmbH
5 * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; version 2 of
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
23 #include <console/console.h>
24 #include <device/device.h>
26 #include <boot/tables.h>
28 #include <arch/coreboot_tables.h>
30 #include <device/pci_def.h>
31 #include <device/pci_ops.h>
33 #include <ec/lenovo/pmh7/pmh7.h>
34 #include <ec/acpi/ec.h>
35 #include <ec/lenovo/h8/h8.h>
36 #include <northbridge/intel/i945/i945.h>
38 static void mainboard_enable(device_t dev)
40 device_t dev0, idedev;
45 /* If we're resuming from suspend, blink suspend LED */
46 dev0 = dev_find_slot(0, PCI_DEVFN(0,0));
47 if (dev0 && pci_read_config32(dev0, SKPAD) == 0xcafed00d)
50 idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1));
51 if (idedev && idedev->chip_info && h8_ultrabay_device_present()) {
52 struct southbridge_intel_i82801gx_config *config = idedev->chip_info;
53 config->ide_enable_primary = 1;
54 pmh7_ultrabay_power_enable(1);
57 pmh7_ultrabay_power_enable(0);
62 struct chip_operations mainboard_ops = {
63 CHIP_NAME(CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_NUMBER)
64 .enable_dev = mainboard_enable,