src/mainboard/kontron/kt690/dsdt.asl

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 /* DefinitionBlock Statement */
  21 DefinitionBlock (
  22         "dsdt.aml",     /* Output filename */
  23         "DSDT",         /* Signature */
  24         0x02,           /* DSDT Revision, needs to be 2 for 64bit */
  25         "COREv2",       /* OEMID */
  26         "COREBOOT",     /* TABLE ID */
  27         0x00010001      /* OEM Revision */
  28         )
  29 {       /* Start of ASL file */
  30         /* #include "../../../arch/x86/acpi/debug.asl" */               /* Include global debug methods if needed */
  31
  32         /* Data to be patched by the BIOS during POST */
  33         /* FIXME the patching is not done yet! */
  34         /* Memory related values */
  35         Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */
  36         Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
  37         Name(PBLN, 0x0) /* Length of BIOS area */
  38
  39         Name(PCBA, 0xE0000000)  /* Base address of PCIe config space */
  40         Name(HPBA, 0xFED00000)  /* Base address of HPET table */
  41
  42         Name(SSFG, 0x0D)                /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
  43
  44         /* USB overcurrent mapping pins.   */
  45         Name(UOM0, 0)
  46         Name(UOM1, 2)
  47         Name(UOM2, 0)
  48         Name(UOM3, 7)
  49         Name(UOM4, 2)
  50         Name(UOM5, 2)
  51         Name(UOM6, 6)
  52         Name(UOM7, 2)
  53         Name(UOM8, 6)
  54         Name(UOM9, 6)
  55
  56         /* Some global data */
  57         Name(OSTP, 3)           /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
  58         Name(OSV, Ones) /* Assume nothing */
  59         Name(PMOD, One) /* Assume APIC */
  60
  61         /* PIC IRQ mapping registers, C00h-C01h */
  62         OperationRegion(PRQM, SystemIO, 0x00000C00, 0x00000002)
  63                 Field(PRQM, ByteAcc, NoLock, Preserve) {
  64                 PRQI, 0x00000008,
  65                 PRQD, 0x00000008,  /* Offset: 1h */
  66         }
  67         IndexField(PRQI, PRQD, ByteAcc, NoLock, Preserve) {
  68                 PINA, 0x00000008,       /* Index 0  */
  69                 PINB, 0x00000008,       /* Index 1 */
  70                 PINC, 0x00000008,       /* Index 2 */
  71                 PIND, 0x00000008,       /* Index 3 */
  72                 AINT, 0x00000008,       /* Index 4 */
  73                 SINT, 0x00000008,       /*  Index 5 */
  74                 , 0x00000008,                /* Index 6 */
  75                 AAUD, 0x00000008,       /* Index 7 */
  76                 AMOD, 0x00000008,       /* Index 8 */
  77                 PINE, 0x00000008,       /* Index 9 */
  78                 PINF, 0x00000008,       /* Index A */
  79                 PING, 0x00000008,       /* Index B */
  80                 PINH, 0x00000008,       /* Index C */
  81         }
  82
  83         /* PCI Error control register */
  84         OperationRegion(PERC, SystemIO, 0x00000C14, 0x00000001)
  85                 Field(PERC, ByteAcc, NoLock, Preserve) {
  86                 SENS, 0x00000001,
  87                 PENS, 0x00000001,
  88                 SENE, 0x00000001,
  89                 PENE, 0x00000001,
  90         }
  91
  92         /* Client Management index/data registers */
  93         OperationRegion(CMT, SystemIO, 0x00000C50, 0x00000002)
  94                 Field(CMT, ByteAcc, NoLock, Preserve) {
  95                 CMTI,      8,
  96                 /* Client Management Data register */
  97                 G64E,   1,
  98                 G64O,      1,
  99                 G32O,      2,
 100                 ,       2,
 101                 GPSL,     2,
 102         }
 103
 104         /* GPM Port register */
 105         OperationRegion(GPT, SystemIO, 0x00000C52, 0x00000001)
 106                 Field(GPT, ByteAcc, NoLock, Preserve) {
 107                 GPB0,1,
 108                 GPB1,1,
 109                 GPB2,1,
 110                 GPB3,1,
 111                 GPB4,1,
 112                 GPB5,1,
 113                 GPB6,1,
 114                 GPB7,1,
 115         }
 116
 117         /* Flash ROM program enable register */
 118         OperationRegion(FRE, SystemIO, 0x00000C6F, 0x00000001)
 119                 Field(FRE, ByteAcc, NoLock, Preserve) {
 120                 ,     0x00000006,
 121                 FLRE, 0x00000001,
 122         }
 123
 124         /* PM2 index/data registers */
 125         OperationRegion(PM2R, SystemIO, 0x00000CD0, 0x00000002)
 126                 Field(PM2R, ByteAcc, NoLock, Preserve) {
 127                 PM2I, 0x00000008,
 128                 PM2D, 0x00000008,
 129         }
 130
 131         /* Power Management I/O registers */
 132         OperationRegion(PIOR, SystemIO, 0x00000CD6, 0x00000002)
 133                 Field(PIOR, ByteAcc, NoLock, Preserve) {
 134                 PIOI, 0x00000008,
 135                 PIOD, 0x00000008,
 136         }
 137         IndexField (PIOI, PIOD, ByteAcc, NoLock, Preserve) {
 138                 Offset(0x00),   /* MiscControl */
 139                 , 1,
 140                 T1EE, 1,
 141                 T2EE, 1,
 142                 Offset(0x01),   /* MiscStatus */
 143                 , 1,
 144                 T1E, 1,
 145                 T2E, 1,
 146                 Offset(0x04),   /* SmiWakeUpEventEnable3 */
 147                 , 7,
 148                 SSEN, 1,
 149                 Offset(0x07),   /* SmiWakeUpEventStatus3 */
 150                 , 7,
 151                 CSSM, 1,
 152                 Offset(0x10),   /* AcpiEnable */
 153                 , 6,
 154                 PWDE, 1,
 155                 Offset(0x1C),   /* ProgramIoEnable */
 156                 , 3,
 157                 MKME, 1,
 158                 IO3E, 1,
 159                 IO2E, 1,
 160                 IO1E, 1,
 161                 IO0E, 1,
 162                 Offset(0x1D),   /* IOMonitorStatus */
 163                 , 3,
 164                 MKMS, 1,
 165                 IO3S, 1,
 166                 IO2S, 1,
 167                 IO1S, 1,
 168                 IO0S,1,
 169                 Offset(0x20),   /* AcpiPmEvtBlk */
 170                 APEB, 16,
 171                 Offset(0x36),   /* GEvtLevelConfig */
 172                 , 6,
 173                 ELC6, 1,
 174                 ELC7, 1,
 175                 Offset(0x37),   /* GPMLevelConfig0 */
 176                 , 3,
 177                 PLC0, 1,
 178                 PLC1, 1,
 179                 PLC2, 1,
 180                 PLC3, 1,
 181                 PLC8, 1,
 182                 Offset(0x38),   /* GPMLevelConfig1 */
 183                 , 1,
 184                  PLC4, 1,
 185                  PLC5, 1,
 186                 , 1,
 187                  PLC6, 1,
 188                  PLC7, 1,
 189                 Offset(0x3B),   /* PMEStatus1 */
 190                 GP0S, 1,
 191                 GM4S, 1,
 192                 GM5S, 1,
 193                 APS, 1,
 194                 GM6S, 1,
 195                 GM7S, 1,
 196                 GP2S, 1,
 197                 STSS, 1,
 198                 Offset(0x55),   /* SoftPciRst */
 199                 SPRE, 1,
 200                 , 1,
 201                 , 1,
 202                 PNAT, 1,
 203                 PWMK, 1,
 204                 PWNS, 1,
 205
 206                 /*      Offset(0x61), */        /*  Options_1 */
 207                 /*              ,7,  */
 208                 /*              R617,1, */
 209
 210                 Offset(0x65),   /* UsbPMControl */
 211                 , 4,
 212                 URRE, 1,
 213                 Offset(0x68),   /* MiscEnable68 */
 214                 , 3,
 215                 TMTE, 1,
 216                 , 1,
 217                 Offset(0x92),   /* GEVENTIN */
 218                 , 7,
 219                 E7IS, 1,
 220                 Offset(0x96),   /* GPM98IN */
 221                 G8IS, 1,
 222                 G9IS, 1,
 223                 Offset(0x9A),   /* EnhanceControl */
 224                 ,7,
 225                 HPDE, 1,
 226                 Offset(0xA8),   /* PIO7654Enable */
 227                 IO4E, 1,
 228                 IO5E, 1,
 229                 IO6E, 1,
 230                 IO7E, 1,
 231                 Offset(0xA9),   /* PIO7654Status */
 232                 IO4S, 1,
 233                 IO5S, 1,
 234                 IO6S, 1,
 235                 IO7S, 1,
 236         }
 237
 238         /* PM1 Event Block
 239         * First word is PM1_Status, Second word is PM1_Enable
 240         */
 241         OperationRegion(P1EB, SystemIO, APEB, 0x04)
 242                 Field(P1EB, ByteAcc, NoLock, Preserve) {
 243                 TMST, 1,
 244                 ,    3,
 245                 BMST,    1,
 246                 GBST,   1,
 247                 Offset(0x01),
 248                 PBST, 1,
 249                 , 1,
 250                 RTST, 1,
 251                 , 3,
 252                 PWST, 1,
 253                 SPWS, 1,
 254                 Offset(0x02),
 255                 TMEN, 1,
 256                 , 4,
 257                 GBEN, 1,
 258                 Offset(0x03),
 259                 PBEN, 1,
 260                 , 1,
 261                 RTEN, 1,
 262                 , 3,
 263                 PWDA, 1,
 264         }
 265
 266         Scope(\_SB) {
 267
 268                 /* PCIe Configuration Space for 16 busses */
 269                 OperationRegion(PCFG, SystemMemory, PCBA, 0x01000000) /* Each bus consumes 1MB */
 270                         Field(PCFG, ByteAcc, NoLock, Preserve) {
 271                         /* Byte offsets are computed using the following technique:
 272                            * ((bus number + 1) * ((device number * 8) * 4096)) + register offset
 273                            * The 8 comes from 8 functions per device, and 4096 bytes per function config space
 274                         */
 275                         Offset(0x00090024),     /* Byte offset to SATA register 24h - Bus 0, Device 18, Function 0 */
 276                         STB5, 32,
 277                         Offset(0x00098042),     /* Byte offset to OHCI0 register 42h - Bus 0, Device 19, Function 0 */
 278                         PT0D, 1,
 279                         PT1D, 1,
 280                         PT2D, 1,
 281                         PT3D, 1,
 282                         PT4D, 1,
 283                         PT5D, 1,
 284                         PT6D, 1,
 285                         PT7D, 1,
 286                         PT8D, 1,
 287                         PT9D, 1,
 288                         Offset(0x000A0004),     /* Byte offset to SMBUS register 4h - Bus 0, Device 20, Function 0 */
 289                         SBIE, 1,
 290                         SBME, 1,
 291                         Offset(0x000A0008),     /* Byte offset to SMBUS register 8h - Bus 0, Device 20, Function 0 */
 292                         SBRI, 8,
 293                         Offset(0x000A0014),     /* Byte offset to SMBUS register 14h - Bus 0, Device 20, Function 0 */
 294                         SBB1, 32,
 295                         Offset(0x000A0078),     /* Byte offset to SMBUS register 78h - Bus 0, Device 20, Function 0 */
 296                         ,14,
 297                         P92E, 1,                /* Port92 decode enable */
 298                 }
 299
 300                 OperationRegion(SB5, SystemMemory, STB5, 0x1000)
 301                         Field(SB5, AnyAcc, NoLock, Preserve)
 302                         {
 303                         /* Port 0 */
 304                         Offset(0x120),          /* Port 0 Task file status */
 305                         P0ER, 1,
 306                         , 2,
 307                         P0DQ, 1,
 308                         , 3,
 309                         P0BY, 1,
 310                         Offset(0x128),          /* Port 0 Serial ATA status */
 311                         P0DD, 4,
 312                         , 4,
 313                         P0IS, 4,
 314                         Offset(0x12C),          /* Port 0 Serial ATA control */
 315                         P0DI, 4,
 316                         Offset(0x130),          /* Port 0 Serial ATA error */
 317                         , 16,
 318                         P0PR, 1,
 319
 320                         /* Port 1 */
 321                         offset(0x1A0),          /* Port 1 Task file status */
 322                         P1ER, 1,
 323                         , 2,
 324                         P1DQ, 1,
 325                         , 3,
 326                         P1BY, 1,
 327                         Offset(0x1A8),          /* Port 1 Serial ATA status */
 328                         P1DD, 4,
 329                         , 4,
 330                         P1IS, 4,
 331                         Offset(0x1AC),          /* Port 1 Serial ATA control */
 332                         P1DI, 4,
 333                         Offset(0x1B0),          /* Port 1 Serial ATA error */
 334                         , 16,
 335                         P1PR, 1,
 336
 337                         /* Port 2 */
 338                         Offset(0x220),          /* Port 2 Task file status */
 339                         P2ER, 1,
 340                         , 2,
 341                         P2DQ, 1,
 342                         , 3,
 343                         P2BY, 1,
 344                         Offset(0x228),          /* Port 2 Serial ATA status */
 345                         P2DD, 4,
 346                         , 4,
 347                         P2IS, 4,
 348                         Offset(0x22C),          /* Port 2 Serial ATA control */
 349                         P2DI, 4,
 350                         Offset(0x230),          /* Port 2 Serial ATA error */
 351                         , 16,
 352                         P2PR, 1,
 353
 354                         /* Port 3 */
 355                         Offset(0x2A0),          /* Port 3 Task file status */
 356                         P3ER, 1,
 357                         , 2,
 358                         P3DQ, 1,
 359                         , 3,
 360                         P3BY, 1,
 361                         Offset(0x2A8),          /* Port 3 Serial ATA status */
 362                         P3DD, 4,
 363                         , 4,
 364                         P3IS, 4,
 365                         Offset(0x2AC),          /* Port 3 Serial ATA control */
 366                         P3DI, 4,
 367                         Offset(0x2B0),          /* Port 3 Serial ATA error */
 368                         , 16,
 369                         P3PR, 1,
 370                 }
 371         }
 372
 373         #include "acpi/routing.asl"
 374
 375         Scope(\_SB) {
 376
 377                 Method(CkOT, 0){
 378
 379                         if(LNotEqual(OSTP, Ones)) {Return(OSTP)}        /* OS version was already detected */
 380
 381                         if(CondRefOf(\_OSI,Local1))
 382                         {
 383                                 Store(1, OSTP)                /* Assume some form of XP */
 384                                 if (\_OSI("Windows 2006"))      /* Vista */
 385                                 {
 386                                         Store(2, OSTP)
 387                                 }
 388                         } else {
 389                                 If(WCMP(\_OS,"Linux")) {
 390                                         Store(3, OSTP)            /* Linux */
 391                                 } Else {
 392                                         Store(4, OSTP)            /* Gotta be WinCE */
 393                                 }
 394                         }
 395                         Return(OSTP)
 396                 }
 397
 398                 Method(_PIC, 0x01, NotSerialized)
 399                 {
 400                         If (Arg0)
 401                         {
 402                                 \_SB.CIRQ()
 403                         }
 404                         Store(Arg0, PMOD)
 405                 }
 406
 407                 Method(CIRQ, 0x00, NotSerialized)
 408                 {
 409                         Store(0, PINA)
 410                         Store(0, PINB)
 411                         Store(0, PINC)
 412                         Store(0, PIND)
 413                         Store(0, PINE)
 414                         Store(0, PINF)
 415                         Store(0, PING)
 416                         Store(0, PINH)
 417                 }
 418
 419                 Name(IRQB, ResourceTemplate(){
 420                         IRQ(Level,ActiveLow,Shared){15}
 421                 })
 422
 423                 Name(IRQP, ResourceTemplate(){
 424                         IRQ(Level,ActiveLow,Exclusive){3, 4, 5, 7, 10, 11, 12, 15}
 425                 })
 426
 427                 Name(PITF, ResourceTemplate(){
 428                         IRQ(Level,ActiveLow,Exclusive){9}
 429                 })
 430
 431                 Device(INTA) {
 432                         Name(_HID, EISAID("PNP0C0F"))
 433                         Name(_UID, 1)
 434
 435                         Method(_STA, 0) {
 436                                 if (PINA) {
 437                                         Return(0x0B) /* sata is invisible */
 438                                 } else {
 439                                         Return(0x09) /* sata is disabled */
 440                                 }
 441                         } /* End Method(_SB.INTA._STA) */
 442
 443                         Method(_DIS ,0) {
 444                                 /* DBGO("\\_SB\\LNKA\\_DIS\n") */
 445                                 Store(0, PINA)
 446                         } /* End Method(_SB.INTA._DIS) */
 447
 448                         Method(_PRS ,0) {
 449                                 /* DBGO("\\_SB\\LNKA\\_PRS\n") */
 450                                 Return(IRQP)
 451                         } /* Method(_SB.INTA._PRS) */
 452
 453                         Method(_CRS ,0) {
 454                                 /* DBGO("\\_SB\\LNKA\\_CRS\n") */
 455                                 CreateWordField(IRQB, 0x1, IRQN)
 456                                 ShiftLeft(1, PINA, IRQN)
 457                                 Return(IRQB)
 458                         } /* Method(_SB.INTA._CRS) */
 459
 460                         Method(_SRS, 1) {
 461                                 /* DBGO("\\_SB\\LNKA\\_CRS\n") */
 462                                 CreateWordField(ARG0, 1, IRQM)
 463
 464                                 /* Use lowest available IRQ */
 465                                 FindSetRightBit(IRQM, Local0)
 466                                 if (Local0) {
 467                                         Decrement(Local0)
 468                                 }
 469                                 Store(Local0, PINA)
 470                         } /* End Method(_SB.INTA._SRS) */
 471                 } /* End Device(INTA) */
 472
 473                 Device(INTB) {
 474                         Name(_HID, EISAID("PNP0C0F"))
 475                         Name(_UID, 2)
 476
 477                         Method(_STA, 0) {
 478                                 if (PINB) {
 479                                         Return(0x0B) /* sata is invisible */
 480                                 } else {
 481                                         Return(0x09) /* sata is disabled */
 482                                 }
 483                         } /* End Method(_SB.INTB._STA) */
 484
 485                         Method(_DIS ,0) {
 486                                 /* DBGO("\\_SB\\LNKB\\_DIS\n") */
 487                                 Store(0, PINB)
 488                         } /* End Method(_SB.INTB._DIS) */
 489
 490                         Method(_PRS ,0) {
 491                                 /* DBGO("\\_SB\\LNKB\\_PRS\n") */
 492                                 Return(IRQP)
 493                         } /* Method(_SB.INTB._PRS) */
 494
 495                         Method(_CRS ,0) {
 496                                 /* DBGO("\\_SB\\LNKB\\_CRS\n") */
 497                                 CreateWordField(IRQB, 0x1, IRQN)
 498                                 ShiftLeft(1, PINB, IRQN)
 499                                 Return(IRQB)
 500                         } /* Method(_SB.INTB._CRS) */
 501
 502                         Method(_SRS, 1) {
 503                                 /* DBGO("\\_SB\\LNKB\\_CRS\n") */
 504                                 CreateWordField(ARG0, 1, IRQM)
 505
 506                                 /* Use lowest available IRQ */
 507                                 FindSetRightBit(IRQM, Local0)
 508                                 if (Local0) {
 509                                         Decrement(Local0)
 510                                 }
 511                                 Store(Local0, PINB)
 512                         } /* End Method(_SB.INTB._SRS) */
 513                 } /* End Device(INTB)  */
 514
 515                 Device(INTC) {
 516                         Name(_HID, EISAID("PNP0C0F"))
 517                         Name(_UID, 3)
 518
 519                         Method(_STA, 0) {
 520                                 if (PINC) {
 521                                         Return(0x0B) /* sata is invisible */
 522                                 } else {
 523                                         Return(0x09) /* sata is disabled */
 524                                 }
 525                         } /* End Method(_SB.INTC._STA) */
 526
 527                         Method(_DIS ,0) {
 528                                 /* DBGO("\\_SB\\LNKC\\_DIS\n") */
 529                                 Store(0, PINC)
 530                         } /* End Method(_SB.INTC._DIS) */
 531
 532                         Method(_PRS ,0) {
 533                                 /* DBGO("\\_SB\\LNKC\\_PRS\n") */
 534                                 Return(IRQP)
 535                         } /* Method(_SB.INTC._PRS) */
 536
 537                         Method(_CRS ,0) {
 538                                 /* DBGO("\\_SB\\LNKC\\_CRS\n") */
 539                                 CreateWordField(IRQB, 0x1, IRQN)
 540                                 ShiftLeft(1, PINC, IRQN)
 541                                 Return(IRQB)
 542                         } /* Method(_SB.INTC._CRS) */
 543
 544                         Method(_SRS, 1) {
 545                                 /* DBGO("\\_SB\\LNKC\\_CRS\n") */
 546                                 CreateWordField(ARG0, 1, IRQM)
 547
 548                                 /* Use lowest available IRQ */
 549                                 FindSetRightBit(IRQM, Local0)
 550                                 if (Local0) {
 551                                         Decrement(Local0)
 552                                 }
 553                                 Store(Local0, PINC)
 554                         } /* End Method(_SB.INTC._SRS) */
 555                 } /* End Device(INTC)  */
 556
 557                 Device(INTD) {
 558                         Name(_HID, EISAID("PNP0C0F"))
 559                         Name(_UID, 4)
 560
 561                         Method(_STA, 0) {
 562                                 if (PIND) {
 563                                         Return(0x0B) /* sata is invisible */
 564                                 } else {
 565                                         Return(0x09) /* sata is disabled */
 566                                 }
 567                         } /* End Method(_SB.INTD._STA) */
 568
 569                         Method(_DIS ,0) {
 570                                 /* DBGO("\\_SB\\LNKD\\_DIS\n") */
 571                                 Store(0, PIND)
 572                         } /* End Method(_SB.INTD._DIS) */
 573
 574                         Method(_PRS ,0) {
 575                                 /* DBGO("\\_SB\\LNKD\\_PRS\n") */
 576                                 Return(IRQP)
 577                         } /* Method(_SB.INTD._PRS) */
 578
 579                         Method(_CRS ,0) {
 580                                 /* DBGO("\\_SB\\LNKD\\_CRS\n") */
 581                                 CreateWordField(IRQB, 0x1, IRQN)
 582                                 ShiftLeft(1, PIND, IRQN)
 583                                 Return(IRQB)
 584                         } /* Method(_SB.INTD._CRS) */
 585
 586                         Method(_SRS, 1) {
 587                                 /* DBGO("\\_SB\\LNKD\\_CRS\n") */
 588                                 CreateWordField(ARG0, 1, IRQM)
 589
 590                                 /* Use lowest available IRQ */
 591                                 FindSetRightBit(IRQM, Local0)
 592                                 if (Local0) {
 593                                         Decrement(Local0)
 594                                 }
 595                                 Store(Local0, PIND)
 596                         } /* End Method(_SB.INTD._SRS) */
 597                 } /* End Device(INTD)  */
 598
 599                 Device(INTE) {
 600                         Name(_HID, EISAID("PNP0C0F"))
 601                         Name(_UID, 5)
 602
 603                         Method(_STA, 0) {
 604                                 if (PINE) {
 605                                         Return(0x0B) /* sata is invisible */
 606                                 } else {
 607                                         Return(0x09) /* sata is disabled */
 608                                 }
 609                         } /* End Method(_SB.INTE._STA) */
 610
 611                         Method(_DIS ,0) {
 612                                 /* DBGO("\\_SB\\LNKE\\_DIS\n") */
 613                                 Store(0, PINE)
 614                         } /* End Method(_SB.INTE._DIS) */
 615
 616                         Method(_PRS ,0) {
 617                                 /* DBGO("\\_SB\\LNKE\\_PRS\n") */
 618                                 Return(IRQP)
 619                         } /* Method(_SB.INTE._PRS) */
 620
 621                         Method(_CRS ,0) {
 622                                 /* DBGO("\\_SB\\LNKE\\_CRS\n") */
 623                                 CreateWordField(IRQB, 0x1, IRQN)
 624                                 ShiftLeft(1, PINE, IRQN)
 625                                 Return(IRQB)
 626                         } /* Method(_SB.INTE._CRS) */
 627
 628                         Method(_SRS, 1) {
 629                                 /* DBGO("\\_SB\\LNKE\\_CRS\n") */
 630                                 CreateWordField(ARG0, 1, IRQM)
 631
 632                                 /* Use lowest available IRQ */
 633                                 FindSetRightBit(IRQM, Local0)
 634                                 if (Local0) {
 635                                         Decrement(Local0)
 636                                 }
 637                                 Store(Local0, PINE)
 638                         } /* End Method(_SB.INTE._SRS) */
 639                 } /* End Device(INTE)  */
 640
 641                 Device(INTF) {
 642                         Name(_HID, EISAID("PNP0C0F"))
 643                         Name(_UID, 6)
 644
 645                         Method(_STA, 0) {
 646                                 if (PINF) {
 647                                         Return(0x0B) /* sata is invisible */
 648                                 } else {
 649                                         Return(0x09) /* sata is disabled */
 650                                 }
 651                         } /* End Method(_SB.INTF._STA) */
 652
 653                         Method(_DIS ,0) {
 654                                 /* DBGO("\\_SB\\LNKF\\_DIS\n") */
 655                                 Store(0, PINF)
 656                         } /* End Method(_SB.INTF._DIS) */
 657
 658                         Method(_PRS ,0) {
 659                                 /* DBGO("\\_SB\\LNKF\\_PRS\n") */
 660                                 Return(PITF)
 661                         } /* Method(_SB.INTF._PRS) */
 662
 663                         Method(_CRS ,0) {
 664                                 /* DBGO("\\_SB\\LNKF\\_CRS\n") */
 665                                 CreateWordField(IRQB, 0x1, IRQN)
 666                                 ShiftLeft(1, PINF, IRQN)
 667                                 Return(IRQB)
 668                         } /* Method(_SB.INTF._CRS) */
 669
 670                         Method(_SRS, 1) {
 671                                 /* DBGO("\\_SB\\LNKF\\_CRS\n") */
 672                                 CreateWordField(ARG0, 1, IRQM)
 673
 674                                 /* Use lowest available IRQ */
 675                                 FindSetRightBit(IRQM, Local0)
 676                                 if (Local0) {
 677                                         Decrement(Local0)
 678                                 }
 679                                 Store(Local0, PINF)
 680                         } /*  End Method(_SB.INTF._SRS) */
 681                 } /* End Device(INTF)  */
 682
 683                 Device(INTG) {
 684                         Name(_HID, EISAID("PNP0C0F"))
 685                         Name(_UID, 7)
 686
 687                         Method(_STA, 0) {
 688                                 if (PING) {
 689                                         Return(0x0B) /* sata is invisible */
 690                                 } else {
 691                                         Return(0x09) /* sata is disabled */
 692                                 }
 693                         } /* End Method(_SB.INTG._STA)  */
 694
 695                         Method(_DIS ,0) {
 696                                 /* DBGO("\\_SB\\LNKG\\_DIS\n") */
 697                                 Store(0, PING)
 698                         } /* End Method(_SB.INTG._DIS)  */
 699
 700                         Method(_PRS ,0) {
 701                                 /* DBGO("\\_SB\\LNKG\\_PRS\n") */
 702                                 Return(IRQP)
 703                         } /* Method(_SB.INTG._CRS)  */
 704
 705                         Method(_CRS ,0) {
 706                                 /* DBGO("\\_SB\\LNKG\\_CRS\n") */
 707                                 CreateWordField(IRQB, 0x1, IRQN)
 708                                 ShiftLeft(1, PING, IRQN)
 709                                 Return(IRQB)
 710                         } /* Method(_SB.INTG._CRS)  */
 711
 712                         Method(_SRS, 1) {
 713                                 /* DBGO("\\_SB\\LNKG\\_CRS\n") */
 714                                 CreateWordField(ARG0, 1, IRQM)
 715
 716                                 /* Use lowest available IRQ */
 717                                 FindSetRightBit(IRQM, Local0)
 718                                 if (Local0) {
 719                                         Decrement(Local0)
 720                                 }
 721                                 Store(Local0, PING)
 722                         } /* End Method(_SB.INTG._SRS)  */
 723                 } /* End Device(INTG)  */
 724
 725                 Device(INTH) {
 726                         Name(_HID, EISAID("PNP0C0F"))
 727                         Name(_UID, 8)
 728
 729                         Method(_STA, 0) {
 730                                 if (PINH) {
 731                                         Return(0x0B) /* sata is invisible */
 732                                 } else {
 733                                         Return(0x09) /* sata is disabled */
 734                                 }
 735                         } /* End Method(_SB.INTH._STA)  */
 736
 737                         Method(_DIS ,0) {
 738                                 /* DBGO("\\_SB\\LNKH\\_DIS\n") */
 739                                 Store(0, PINH)
 740                         } /* End Method(_SB.INTH._DIS)  */
 741
 742                         Method(_PRS ,0) {
 743                                 /* DBGO("\\_SB\\LNKH\\_PRS\n") */
 744                                 Return(IRQP)
 745                         } /* Method(_SB.INTH._CRS)  */
 746
 747                         Method(_CRS ,0) {
 748                                 /* DBGO("\\_SB\\LNKH\\_CRS\n") */
 749                                 CreateWordField(IRQB, 0x1, IRQN)
 750                                 ShiftLeft(1, PINH, IRQN)
 751                                 Return(IRQB)
 752                         } /* Method(_SB.INTH._CRS)  */
 753
 754                         Method(_SRS, 1) {
 755                                 /* DBGO("\\_SB\\LNKH\\_CRS\n") */
 756                                 CreateWordField(ARG0, 1, IRQM)
 757
 758                                 /* Use lowest available IRQ */
 759                                 FindSetRightBit(IRQM, Local0)
 760                                 if (Local0) {
 761                                         Decrement(Local0)
 762                                 }
 763                                 Store(Local0, PINH)
 764                         } /* End Method(_SB.INTH._SRS)  */
 765                 } /* End Device(INTH)   */
 766
 767         }   /* End Scope(_SB)  */
 768
 769
 770         /* Supported sleep states: */
 771         Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )        /* (S0) - working state */
 772
 773         If (LAnd(SSFG, 0x01)) {
 774                 Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )        /* (S1) - sleeping w/CPU context */
 775         }
 776         If (LAnd(SSFG, 0x02)) {
 777                 Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )        /* (S2) - "light" Suspend to RAM */
 778         }
 779         If (LAnd(SSFG, 0x04)) {
 780                 Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )        /* (S3) - Suspend to RAM */
 781         }
 782         If (LAnd(SSFG, 0x08)) {
 783                 Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )        /* (S4) - Suspend to Disk */
 784         }
 785
 786         Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )        /* (S5) - Soft Off */
 787
 788         Name(\_SB.CSPS ,0)                              /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
 789         Name(CSMS, 0)                   /* Current System State */
 790
 791         /* Wake status package */
 792         Name(WKST,Package(){Zero, Zero})
 793
 794         /*
 795         * \_PTS - Prepare to Sleep method
 796         *
 797         *       Entry:
 798         *               Arg0=The value of the sleeping state S1=1, S2=2, etc
 799         *
 800         * Exit:
 801         *               -none-
 802         *
 803         * The _PTS control method is executed at the beginning of the sleep process
 804         * for S1-S5. The sleeping value is passed to the _PTS control method.   This
 805         * control method may be executed a relatively long time before entering the
 806         * sleep state and the OS may abort      the operation without notification to
 807         * the ACPI driver.  This method cannot modify the configuration or power
 808         * state of any device in the system.
 809         */
 810         Method(\_PTS, 1) {
 811                 /* DBGO("\\_PTS\n") */
 812                 /* DBGO("From S0 to S") */
 813                 /* DBGO(Arg0) */
 814                 /* DBGO("\n") */
 815
 816                 /* Don't allow PCIRST# to reset USB */
 817                 if (LEqual(Arg0,3)){
 818                         Store(0,URRE)
 819                 }
 820
 821                 /* Clear sleep SMI status flag and enable sleep SMI trap. */
 822                 /*Store(One, CSSM)
 823                 Store(One, SSEN)*/
 824
 825                 /* On older chips, clear PciExpWakeDisEn */
 826                 /*if (LLessEqual(\_SB.SBRI, 0x13)) {
 827                 *       Store(0,\_SB.PWDE)
 828                 *}
 829                 */
 830
 831                 /* Clear wake status structure. */
 832                 Store(0, Index(WKST,0))
 833                 Store(0, Index(WKST,1))
 834                 \_SB.PCI0.SIOS (Arg0)
 835         } /* End Method(\_PTS) */
 836
 837         /*
 838         *  The following method results in a "not a valid reserved NameSeg"
 839         *  warning so I have commented it out for the duration.  It isn't
 840         *  used, so it could be removed.
 841         *
 842         *
 843         *       \_GTS OEM Going To Sleep method
 844         *
 845         *       Entry:
 846         *               Arg0=The value of the sleeping state S1=1, S2=2
 847         *
 848         *       Exit:
 849         *               -none-
 850         *
 851         *  Method(\_GTS, 1) {
 852         *  DBGO("\\_GTS\n")
 853         *  DBGO("From S0 to S")
 854         *  DBGO(Arg0)
 855         *  DBGO("\n")
 856         *  }
 857         */
 858
 859         /*
 860         *       \_BFS OEM Back From Sleep method
 861         *
 862         *       Entry:
 863         *               Arg0=The value of the sleeping state S1=1, S2=2
 864         *
 865         *       Exit:
 866         *               -none-
 867         */
 868         Method(\_BFS, 1) {
 869                 /* DBGO("\\_BFS\n") */
 870                 /* DBGO("From S") */
 871                 /* DBGO(Arg0) */
 872                 /* DBGO(" to S0\n") */
 873         }
 874
 875         /*
 876         *  \_WAK System Wake method
 877         *
 878         *       Entry:
 879         *               Arg0=The value of the sleeping state S1=1, S2=2
 880         *
 881         *       Exit:
 882         *               Return package of 2 DWords
 883         *               Dword 1 - Status
 884         *                       0x00000000      wake succeeded
 885         *                       0x00000001      Wake was signaled but failed due to lack of power
 886         *                       0x00000002      Wake was signaled but failed due to thermal condition
 887         *               Dword 2 - Power Supply state
 888         *                       if non-zero the effective S-state the power supply entered
 889         */
 890         Method(\_WAK, 1) {
 891                 /* DBGO("\\_WAK\n") */
 892                 /* DBGO("From S") */
 893                 /* DBGO(Arg0) */
 894                 /* DBGO(" to S0\n") */
 895
 896                 /* Re-enable HPET */
 897                 Store(1,HPDE)
 898
 899                 /* Restore PCIRST# so it resets USB */
 900                 if (LEqual(Arg0,3)){
 901                         Store(1,URRE)
 902                 }
 903
 904                 /* Arbitrarily clear PciExpWakeStatus */
 905                 Store(PWST, PWST)
 906
 907                 /* if(DeRefOf(Index(WKST,0))) {
 908                 *       Store(0, Index(WKST,1))
 909                 * } else {
 910                 *       Store(Arg0, Index(WKST,1))
 911                 * }
 912                 */
 913                 \_SB.PCI0.SIOW (Arg0)
 914                 Return(WKST)
 915         } /* End Method(\_WAK) */
 916
 917         Scope(\_GPE) {  /* Start Scope GPE */
 918                 /*  General event 0  */
 919                 /* Method(_L00) {
 920                 *       DBGO("\\_GPE\\_L00\n")
 921                 * }
 922                 */
 923
 924                 /*  General event 1  */
 925                 /* Method(_L01) {
 926                 *       DBGO("\\_GPE\\_L00\n")
 927                 * }
 928                 */
 929
 930                 /*  General event 2  */
 931                 /* Method(_L02) {
 932                 *       DBGO("\\_GPE\\_L00\n")
 933                 * }
 934                 */
 935
 936                 /*  General event 3  */
 937                 Method(_L03) {
 938                         /* DBGO("\\_GPE\\_L00\n") */
 939                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 940                 }
 941
 942                 /*  General event 4  */
 943                 /* Method(_L04) {
 944                 *       DBGO("\\_GPE\\_L00\n")
 945                 * }
 946                 */
 947
 948                 /*  General event 5  */
 949                 /* Method(_L05) {
 950                 *       DBGO("\\_GPE\\_L00\n")
 951                 * }
 952                 */
 953
 954                 /*  General event 6 - Used for GPM6, moved to USB.asl */
 955                 /* Method(_L06) {
 956                 *       DBGO("\\_GPE\\_L00\n")
 957                 * }
 958                 */
 959
 960                 /*  General event 7 - Used for GPM7, moved to USB.asl */
 961                 /* Method(_L07) {
 962                 *       DBGO("\\_GPE\\_L07\n")
 963                 * }
 964                 */
 965
 966                 /*  Legacy PM event  */
 967                 Method(_L08) {
 968                         /* DBGO("\\_GPE\\_L08\n") */
 969                 }
 970
 971                 /*  Temp warning (TWarn) event  */
 972                 Method(_L09) {
 973                         /* DBGO("\\_GPE\\_L09\n") */
 974                         Notify (\_TZ.TZ00, 0x80)
 975                 }
 976
 977                 /*  Reserved  */
 978                 /* Method(_L0A) {
 979                 *       DBGO("\\_GPE\\_L0A\n")
 980                 * }
 981                 */
 982
 983                 /*  USB controller PME#  */
 984                 Method(_L0B) {
 985                         /* DBGO("\\_GPE\\_L0B\n") */
 986                         Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
 987                         Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
 988                         Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
 989                         Notify(\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
 990                         Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
 991                         Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
 992                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 993                 }
 994
 995                 /*  AC97 controller PME#  */
 996                 /* Method(_L0C) {
 997                 *       DBGO("\\_GPE\\_L0C\n")
 998                 * }
 999                 */
1000
1001                 /*  OtherTherm PME#  */
1002                 /* Method(_L0D) {
1003                 *       DBGO("\\_GPE\\_L0D\n")
1004                 * }
1005                 */
1006
1007                 /*  GPM9 SCI event - Moved to USB.asl */
1008                 /* Method(_L0E) {
1009                 *       DBGO("\\_GPE\\_L0E\n")
1010                 * }
1011                 */
1012
1013                 /*  PCIe HotPlug event  */
1014                 /* Method(_L0F) {
1015                 *       DBGO("\\_GPE\\_L0F\n")
1016                 * }
1017                 */
1018
1019                 /*  ExtEvent0 SCI event  */
1020                 Method(_L10) {
1021                         /* DBGO("\\_GPE\\_L10\n") */
1022                 }
1023
1024
1025                 /*  ExtEvent1 SCI event  */
1026                 Method(_L11) {
1027                         /* DBGO("\\_GPE\\_L11\n") */
1028                 }
1029
1030                 /*  PCIe PME# event  */
1031                 /* Method(_L12) {
1032                 *       DBGO("\\_GPE\\_L12\n")
1033                 * }
1034                 */
1035
1036                 /*  GPM0 SCI event - Moved to USB.asl */
1037                 /* Method(_L13) {
1038                 *       DBGO("\\_GPE\\_L13\n")
1039                 * }
1040                 */
1041
1042                 /*  GPM1 SCI event - Moved to USB.asl */
1043                 /* Method(_L14) {
1044                 *       DBGO("\\_GPE\\_L14\n")
1045                 * }
1046                 */
1047
1048                 /*  GPM2 SCI event - Moved to USB.asl */
1049                 /* Method(_L15) {
1050                 *       DBGO("\\_GPE\\_L15\n")
1051                 * }
1052                 */
1053
1054                 /*  GPM3 SCI event - Moved to USB.asl */
1055                 /* Method(_L16) {
1056                 *       DBGO("\\_GPE\\_L16\n")
1057                 * }
1058                 */
1059
1060                 /*  GPM8 SCI event - Moved to USB.asl */
1061                 /* Method(_L17) {
1062                 *       DBGO("\\_GPE\\_L17\n")
1063                 * }
1064                 */
1065
1066                 /*  GPIO0 or GEvent8 event  */
1067                 Method(_L18) {
1068                         /* DBGO("\\_GPE\\_L18\n") */
1069                         Notify(\_SB.PCI0.PBR2, 0x02) /* NOTIFY_DEVICE_WAKE */
1070                         Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
1071                         Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
1072                         Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
1073                         Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
1074                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
1075                 }
1076
1077                 /*  GPM4 SCI event - Moved to USB.asl */
1078                 /* Method(_L19) {
1079                 *       DBGO("\\_GPE\\_L19\n")
1080                 * }
1081                 */
1082
1083                 /*  GPM5 SCI event - Moved to USB.asl */
1084                 /* Method(_L1A) {
1085                 *       DBGO("\\_GPE\\_L1A\n")
1086                 * }
1087                 */
1088
1089                 /*  Azalia SCI event  */
1090                 Method(_L1B) {
1091                         /* DBGO("\\_GPE\\_L1B\n") */
1092                         Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
1093                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
1094                 }
1095
1096                 /*  GPM6 SCI event - Reassigned to _L06 */
1097                 /* Method(_L1C) {
1098                 *       DBGO("\\_GPE\\_L1C\n")
1099                 * }
1100                 */
1101
1102                 /*  GPM7 SCI event - Reassigned to _L07 */
1103                 /* Method(_L1D) {
1104                 *       DBGO("\\_GPE\\_L1D\n")
1105                 * }
1106                 */
1107
1108                 /*  GPIO2 or GPIO66 SCI event  */
1109                 /* Method(_L1E) {
1110                 *       DBGO("\\_GPE\\_L1E\n")
1111                 * }
1112                 */
1113
1114                 /*  SATA SCI event - Moved to sata.asl */
1115                 /* Method(_L1F) {
1116                 *        DBGO("\\_GPE\\_L1F\n")
1117                 * }
1118                 */
1119
1120         }       /* End Scope GPE */
1121
1122         #include "acpi/usb.asl"
1123
1124         /* South Bridge */
1125         Scope(\_SB) { /* Start \_SB scope */
1126                 #include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
1127
1128                 /*  _SB.PCI0 */
1129                 /* Note: Only need HID on Primary Bus */
1130                 Device(PCI0) {
1131                         External (TOM1)
1132                         External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
1133                         Name(_HID, EISAID("PNP0A03"))
1134                         Name(_ADR, 0x00180000)  /* Dev# = BSP Dev#, Func# = 0 */
1135                         Method(_BBN, 0) { /* Bus number = 0 */
1136                                 Return(0)
1137                         }
1138                         Method(_STA, 0) {
1139                                 /* DBGO("\\_SB\\PCI0\\_STA\n") */
1140                                 Return(0x0B)     /* Status is visible */
1141                         }
1142
1143                         Method(_PRT,0) {
1144                                 If(PMOD){ Return(APR0) }   /* APIC mode */
1145                                 Return (PR0)                  /* PIC Mode */
1146                         } /* end _PRT */
1147
1148                         /* Describe the Northbridge devices */
1149                         Device(AMRT) {
1150                                 Name(_ADR, 0x00000000)
1151                         } /* end AMRT */
1152
1153                         /* The internal GFX bridge */
1154                         Device(AGPB) {
1155                                 Name(_ADR, 0x00010000)
1156                                 Name(_PRW, Package() {0x18, 4})
1157                                 Method(_PRT,0) {
1158                                         Return (APR1)
1159                                 }
1160                         }  /* end AGPB */
1161
1162                         /* The external GFX bridge */
1163                         Device(PBR2) {
1164                                 Name(_ADR, 0x00020000)
1165                                 Name(_PRW, Package() {0x18, 4})
1166                                 Method(_PRT,0) {
1167                                         If(PMOD){ Return(APS2) }   /* APIC mode */
1168                                         Return (PS2)                  /* PIC Mode */
1169                                 } /* end _PRT */
1170                         } /* end PBR2 */
1171
1172                         /* Dev3 is also an external GFX bridge, not used in Herring */
1173
1174                         Device(PBR4) {
1175                                 Name(_ADR, 0x00040000)
1176                                 Name(_PRW, Package() {0x18, 4})
1177                                 Method(_PRT,0) {
1178                                         If(PMOD){ Return(APS4) }   /* APIC mode */
1179                                         Return (PS4)                  /* PIC Mode */
1180                                 } /* end _PRT */
1181                         } /* end PBR4 */
1182
1183                         Device(PBR5) {
1184                                 Name(_ADR, 0x00050000)
1185                                 Name(_PRW, Package() {0x18, 4})
1186                                 Method(_PRT,0) {
1187                                         If(PMOD){ Return(APS5) }   /* APIC mode */
1188                                         Return (PS5)                  /* PIC Mode */
1189                                 } /* end _PRT */
1190                         } /* end PBR5 */
1191
1192                         Device(PBR6) {
1193                                 Name(_ADR, 0x00060000)
1194                                 Name(_PRW, Package() {0x18, 4})
1195                                 Method(_PRT,0) {
1196                                         If(PMOD){ Return(APS6) }   /* APIC mode */
1197                                         Return (PS6)                  /* PIC Mode */
1198                                 } /* end _PRT */
1199                         } /* end PBR6 */
1200
1201                         /* The onboard EtherNet chip */
1202                         Device(PBR7) {
1203                                 Name(_ADR, 0x00070000)
1204                                 Name(_PRW, Package() {0x18, 4})
1205                                 Method(_PRT,0) {
1206                                         If(PMOD){ Return(APS7) }   /* APIC mode */
1207                                         Return (PS7)                  /* PIC Mode */
1208                                 } /* end _PRT */
1209                         } /* end PBR7 */
1210
1211
1212                         /* PCI slot 1, 2, 3 */
1213                         Device(PIBR) {
1214                                 Name(_ADR, 0x00140004)
1215                                 Name(_PRW, Package() {0x18, 4})
1216
1217                                 Method(_PRT, 0) {
1218                                         Return (PCIB)
1219                                 }
1220                         }
1221
1222                         /* Describe the Southbridge devices */
1223                         Device(STCR) {
1224                                 Name(_ADR, 0x00120000)
1225                                 #include "acpi/sata.asl"
1226                         } /* end STCR */
1227
1228                         Device(UOH1) {
1229                                 Name(_ADR, 0x00130000)
1230                                 Name(_PRW, Package() {0x0B, 3})
1231                         } /* end UOH1 */
1232
1233                         Device(UOH2) {
1234                                 Name(_ADR, 0x00130001)
1235                                 Name(_PRW, Package() {0x0B, 3})
1236                         } /* end UOH2 */
1237
1238                         Device(UOH3) {
1239                                 Name(_ADR, 0x00130002)
1240                                 Name(_PRW, Package() {0x0B, 3})
1241                         } /* end UOH3 */
1242
1243                         Device(UOH4) {
1244                                 Name(_ADR, 0x00130003)
1245                                 Name(_PRW, Package() {0x0B, 3})
1246                         } /* end UOH4 */
1247
1248                         Device(UOH5) {
1249                                 Name(_ADR, 0x00130004)
1250                                 Name(_PRW, Package() {0x0B, 3})
1251                         } /* end UOH5 */
1252
1253                         Device(UEH1) {
1254                                 Name(_ADR, 0x00130005)
1255                                 Name(_PRW, Package() {0x0B, 3})
1256                         } /* end UEH1 */
1257
1258                         Device(SBUS) {
1259                                 Name(_ADR, 0x00140000)
1260                         } /* end SBUS */
1261
1262                         /* Primary (and only) IDE channel */
1263                         Device(IDEC) {
1264                                 Name(_ADR, 0x00140001)
1265                                 #include "acpi/ide.asl"
1266                         } /* end IDEC */
1267
1268                         Device(AZHD) {
1269                                 Name(_ADR, 0x00140002)
1270                                 OperationRegion(AZPD, PCI_Config, 0x00, 0x100)
1271                                         Field(AZPD, AnyAcc, NoLock, Preserve) {
1272                                         offset (0x42),
1273                                         NSDI, 1,
1274                                         NSDO, 1,
1275                                         NSEN, 1,
1276                                         offset (0x44),
1277                                         IPCR, 4,
1278                                         offset (0x54),
1279                                         PWST, 2,
1280                                         , 6,
1281                                         PMEB, 1,
1282                                         , 6,
1283                                         PMST, 1,
1284                                         offset (0x62),
1285                                         MMCR, 1,
1286                                         offset (0x64),
1287                                         MMLA, 32,
1288                                         offset (0x68),
1289                                         MMHA, 32,
1290                                         offset (0x6C),
1291                                         MMDT, 16,
1292                                 }
1293
1294                                 Method(_INI) {
1295                                         If(LEqual(OSTP,3)){   /* If we are running Linux */
1296                                                 Store(zero, NSEN)
1297                                                 Store(one, NSDO)
1298                                                 Store(one, NSDI)
1299                                         }
1300                                 }
1301                         } /* end AZHD */
1302
1303                         Device(LIBR) {
1304                                 Name(_ADR, 0x00140003)
1305                                 /* Method(_INI) {
1306                                 *       DBGO("\\_SB\\PCI0\\LpcIsaBr\\_INI\n")
1307                                 } */ /* End Method(_SB.SBRDG._INI) */
1308
1309                                 /* Real Time Clock Device */
1310                                 Device(RTC0) {
1311                                         Name(_HID, EISAID("PNP0B00"))   /* AT Real Time Clock (not PIIX4 compatible) */
1312                                         Name(_CRS, ResourceTemplate() {
1313                                                 IRQNoFlags(){8}
1314                                                 IO(Decode16,0x0070, 0x0070, 0, 2)
1315                                                 /* IO(Decode16,0x0070, 0x0070, 0, 4) */
1316                                         })
1317                                 } /* End Device(_SB.PCI0.LpcIsaBr.RTC0) */
1318
1319                                 Device(TMR) {   /* Timer */
1320                                         Name(_HID,EISAID("PNP0100"))    /* System Timer */
1321                                         Name(_CRS, ResourceTemplate() {
1322                                                 IRQNoFlags(){0}
1323                                                 IO(Decode16, 0x0040, 0x0040, 0, 4)
1324                                                 /* IO(Decode16, 0x0048, 0x0048, 0, 4) */
1325                                         })
1326                                 } /* End Device(_SB.PCI0.LpcIsaBr.TMR) */
1327
1328                                 Device(SPKR) {  /* Speaker */
1329                                         Name(_HID,EISAID("PNP0800"))    /* AT style speaker */
1330                                         Name(_CRS, ResourceTemplate() {
1331                                                 IO(Decode16, 0x0061, 0x0061, 0, 1)
1332                                         })
1333                                 } /* End Device(_SB.PCI0.LpcIsaBr.SPKR) */
1334
1335                                 Device(PIC) {
1336                                         Name(_HID,EISAID("PNP0000"))    /* AT Interrupt Controller */
1337                                         Name(_CRS, ResourceTemplate() {
1338                                                 IRQNoFlags(){2}
1339                                                 IO(Decode16,0x0020, 0x0020, 0, 2)
1340                                                 IO(Decode16,0x00A0, 0x00A0, 0, 2)
1341                                                 /* IO(Decode16, 0x00D0, 0x00D0, 0x10, 0x02) */
1342                                                 /* IO(Decode16, 0x04D0, 0x04D0, 0x10, 0x02) */
1343                                         })
1344                                 } /* End Device(_SB.PCI0.LpcIsaBr.PIC) */
1345
1346                                 Device(MAD) { /* 8257 DMA */
1347                                         Name(_HID,EISAID("PNP0200"))    /* Hardware Device ID */
1348                                         Name(_CRS, ResourceTemplate() {
1349                                                 DMA(Compatibility,BusMaster,Transfer8){4}
1350                                                 IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
1351                                                 IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
1352                                                 IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
1353                                                 IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
1354                                                 IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
1355                                                 IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
1356                                         }) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
1357                                 } /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
1358
1359                                 Device(COPR) {
1360                                         Name(_HID,EISAID("PNP0C04"))    /* Math Coprocessor */
1361                                         Name(_CRS, ResourceTemplate() {
1362                                                 IO(Decode16, 0x00F0, 0x00F0, 0, 0x10)
1363                                                 IRQNoFlags(){13}
1364                                         })
1365                                 } /* End Device(_SB.PCI0.LpcIsaBr.COPR) */
1366
1367                                 Device(HPTM) {
1368                                         Name(_HID,EISAID("PNP0103"))
1369                                         Name(CRS,ResourceTemplate()     {
1370                                                 Memory32Fixed(ReadOnly,0xFED00000, 0x00000400, HPT)     /* 1kb reserved space */
1371                                         })
1372                                         Method(_STA, 0) {
1373                                                 Return(0x0F) /* sata is visible */
1374                                         }
1375                                         Method(_CRS, 0) {
1376                                                 CreateDwordField(CRS, ^HPT._BAS, HPBA)
1377                                                 Store(HPBA, HPBA)
1378                                                 Return(CRS)
1379                                         }
1380                                 } /* End Device(_SB.PCI0.LpcIsaBr.COPR) */
1381                         } /* end LIBR */
1382
1383                         Device(HPBR) {
1384                                 Name(_ADR, 0x00140004)
1385                         } /* end HostPciBr */
1386
1387                         Device(ACAD) {
1388                                 Name(_ADR, 0x00140005)
1389                         } /* end Ac97audio */
1390
1391                         Device(ACMD) {
1392                                 Name(_ADR, 0x00140006)
1393                         } /* end Ac97modem */
1394
1395                         /* ITE IT8712F Support */
1396                         OperationRegion (IOID, SystemIO, 0x2E, 0x02)    /* sometimes it is 0x4E */
1397                                 Field (IOID, ByteAcc, NoLock, Preserve)
1398                                 {
1399                                         SIOI,   8,    SIOD,   8         /* 0x2E and 0x2F */
1400                                 }
1401
1402                         IndexField (SIOI, SIOD, ByteAcc, NoLock, Preserve)
1403                         {
1404                                         Offset (0x07),
1405                                 LDN,    8,      /* Logical Device Number */
1406                                         Offset (0x20),
1407                                 CID1,   8,      /* Chip ID Byte 1, 0x87 */
1408                                 CID2,   8,      /* Chip ID Byte 2, 0x12 */
1409                                         Offset (0x30),
1410                                 ACTR,   8,      /* Function activate */
1411                                         Offset (0xF0),
1412                                 APC0,   8,      /* APC/PME Event Enable Register */
1413                                 APC1,   8,      /* APC/PME Status Register */
1414                                 APC2,   8,      /* APC/PME Control Register 1 */
1415                                 APC3,   8,      /* Environment Controller Special Configuration Register */
1416                                 APC4,   8       /* APC/PME Control Register 2 */
1417                         }
1418
1419                         /* Enter the IT8712F MB PnP Mode */
1420                         Method (EPNP)
1421                         {
1422                                 Store(0x87, SIOI)
1423                                 Store(0x01, SIOI)
1424                                 Store(0x55, SIOI)
1425                                 Store(0x55, SIOI) /* IT8712F magic number */
1426                         }
1427                         /* Exit the IT8712F MB PnP Mode */
1428                         Method (XPNP)
1429                         {
1430                                 Store (0x02, SIOI)
1431                                 Store (0x02, SIOD)
1432                         }
1433
1434                         /*
1435                          * Keyboard PME is routed to SB600 Gevent3. We can wake
1436                          * up the system by pressing the key.
1437                          */
1438                         Method (SIOS, 1)
1439                         {
1440                                 /* We only enable KBD PME for S5. */
1441                                 If (LLess (Arg0, 0x05))
1442                                 {
1443                                         EPNP()
1444                                         /* DBGO("IT8712F\n") */
1445
1446                                         Store (0x4, LDN)
1447                                         Store (One, ACTR)  /* Enable EC */
1448                                         /*
1449                                         Store (0x4, LDN)
1450                                         Store (0x04, APC4)
1451                                         */  /* falling edge. which mode? Not sure. */
1452
1453                                         Store (0x4, LDN)
1454                                         Store (0x08, APC1) /* clear PME status, Use 0x18 for mouse & KBD */
1455                                         Store (0x4, LDN)
1456                                         Store (0x08, APC0) /* enable PME, Use 0x18 for mouse & KBD */
1457
1458                                         XPNP()
1459                                 }
1460                         }
1461                         Method (SIOW, 1)
1462                         {
1463                                 EPNP()
1464                                 Store (0x4, LDN)
1465                                 Store (Zero, APC0) /* disable keyboard PME */
1466                                 Store (0x4, LDN)
1467                                 Store (0xFF, APC1) /* clear keyboard PME status */
1468                                 XPNP()
1469                         }
1470
1471                         Name(CRES, ResourceTemplate() {
1472                                 IO(Decode16, 0x0CF8, 0x0CF8, 1, 8)
1473
1474                                 WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
1475                                         0x0000,                 /* address granularity */
1476                                         0x0000,                 /* range minimum */
1477                                         0x0CF7,                 /* range maximum */
1478                                         0x0000,                 /* translation */
1479                                         0x0CF8                  /* length */
1480                                 )
1481
1482                                 WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
1483                                         0x0000,                 /* address granularity */
1484                                         0x0D00,                 /* range minimum */
1485                                         0xFFFF,                 /* range maximum */
1486                                         0x0000,                 /* translation */
1487                                         0xF300                  /* length */
1488                                 )
1489
1490                                 Memory32Fixed(READWRITE, 0, 0xA0000, BSMM)
1491                                 Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM)   /* VGA memory space */
1492                                 Memory32Fixed(READONLY, 0x000C0000, 0x00020000, EMM1)   /* Assume C0000-E0000 empty */
1493                                 Memory32Fixed(READONLY, 0x000E0000, 0x00020000, RDBS)   /* BIOS ROM area */
1494
1495                                 /* DRAM Memory from 1MB to TopMem */
1496                                 Memory32Fixed(READWRITE, 0x00100000, 0, DMLO)   /* 1MB to TopMem */
1497
1498                                 /* BIOS space just below 4GB */
1499                                 DWORDMemory(
1500                                         ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
1501                                         0x00,                   /* Granularity */
1502                                         0x00000000,             /* Min */
1503                                         0x00000000,             /* Max */
1504                                         0x00000000,             /* Translation */
1505                                         0x00000001,             /* Max-Min, RLEN */
1506                                         ,,
1507                                         PCBM
1508                                 )
1509
1510                                 /* DRAM memory from 4GB to TopMem2 */
1511                                 QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
1512                                         0x00000000,             /* Granularity */
1513                                         0x00000000,             /* Min */
1514                                         0x00000000,             /* Max */
1515                                         0x00000000,             /* Translation */
1516                                         0x00000001,             /* Max-Min, RLEN */
1517                                         ,,
1518                                         DMHI
1519                                 )
1520
1521                                 /* BIOS space just below 16EB */
1522                                 QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
1523                                         0x00000000,             /* Granularity */
1524                                         0x00000000,             /* Min */
1525                                         0x00000000,             /* Max */
1526                                         0x00000000,             /* Translation */
1527                                         0x00000001,             /* Max-Min, RLEN */
1528                                         ,,
1529                                         PEBM
1530                                 )
1531
1532                         }) /* End Name(_SB.PCI0.CRES) */
1533
1534                         Method(_CRS, 0) {
1535                                 /* DBGO("\\_SB\\PCI0\\_CRS\n") */
1536
1537                                 CreateDWordField(CRES, ^EMM1._BAS, EM1B)
1538                                 CreateDWordField(CRES, ^EMM1._LEN, EM1L)
1539                                 CreateDWordField(CRES, ^DMLO._BAS, DMLB)
1540                                 CreateDWordField(CRES, ^DMLO._LEN, DMLL)
1541                                 CreateDWordField(CRES, ^PCBM._MIN, PBMB)
1542                                 CreateDWordField(CRES, ^PCBM._LEN, PBML)
1543
1544                                 CreateQWordField(CRES, ^DMHI._MIN, DMHB)
1545                                 CreateQWordField(CRES, ^DMHI._LEN, DMHL)
1546                                 CreateQWordField(CRES, ^PEBM._MIN, EBMB)
1547                                 CreateQWordField(CRES, ^PEBM._LEN, EBML)
1548
1549                                 If(LGreater(LOMH, 0xC0000)){
1550                                         Store(0xC0000, EM1B)    /* Hole above C0000 and below E0000 */
1551                                         Subtract(LOMH, 0xC0000, EM1L)   /* subtract start, assumes allocation from C0000 going up */
1552                                 }
1553
1554                                 /* Set size of memory from 1MB to TopMem */
1555                                 Subtract(TOM1, 0x100000, DMLL)
1556
1557                                 /*
1558                                 * If(LNotEqual(TOM2, 0x00000000)){
1559                                 *       Store(0x100000000,DMHB)                 DRAM from 4GB to TopMem2
1560                                 *       ShiftLeft(TOM2, 20, Local0)
1561                                 *       Subtract(Local0, 0x100000000, DMHL)
1562                                 * }
1563                                 */
1564
1565                                 /* If there is no memory above 4GB, put the BIOS just below 4GB */
1566                                 If(LEqual(TOM2, 0x00000000)){
1567                                         Store(PBAD,PBMB)                        /* Reserve the "BIOS" space */
1568                                         Store(PBLN,PBML)
1569                                 }
1570                                 Else {  /* Otherwise, put the BIOS just below 16EB */
1571                                         ShiftLeft(PBAD,16,EBMB)         /* Reserve the "BIOS" space */
1572                                         Store(PBLN,EBML)
1573                                 }
1574
1575                                 Return(CRES) /* note to change the Name buffer */
1576                         }  /* end of Method(_SB.PCI0._CRS) */
1577
1578                         /*
1579                         *
1580                         *               FIRST METHOD CALLED UPON BOOT
1581                         *
1582                         *  1. If debugging, print current OS and ACPI interpreter.
1583                         *  2. Get PCI Interrupt routing from ACPI VSM, this
1584                         *     value is based on user choice in BIOS setup.
1585                         */
1586                         Method(_INI, 0) {
1587                                 /* DBGO("\\_SB\\_INI\n") */
1588                                 /* DBGO("   DSDT.ASL code from ") */
1589                                 /* DBGO(__DATE__) */
1590                                 /* DBGO(" ") */
1591                                 /* DBGO(__TIME__) */
1592                                 /* DBGO("\n   Sleep states supported: ") */
1593                                 /* DBGO("\n") */
1594                                 /* DBGO("   \\_OS=") */
1595                                 /* DBGO(\_OS) */
1596                                 /* DBGO("\n   \\_REV=") */
1597                                 /* DBGO(\_REV) */
1598                                 /* DBGO("\n") */
1599
1600                                 /* Determine the OS we're running on */
1601                                 CkOT()
1602
1603                                 /* On older chips, clear PciExpWakeDisEn */
1604                                 /*if (LLessEqual(\SBRI, 0x13)) {
1605                                 *       Store(0,\PWDE)
1606                                 * }
1607                                 */
1608                         } /* End Method(_SB._INI) */
1609                 } /* End Device(PCI0)  */
1610
1611                 Device(PWRB) {  /* Start Power button device */
1612                         Name(_HID, EISAID("PNP0C0C"))
1613                         Name(_UID, 0xAA)
1614                         Name(_PRW, Package () {3, 0x04})        /* wake from S1-S4 */
1615                         Name(_STA, 0x0B) /* sata is invisible */
1616                 }
1617         } /* End \_SB scope */
1618
1619         Scope(\_SI) {
1620                 Method(_SST, 1) {
1621                         /* DBGO("\\_SI\\_SST\n") */
1622                         /* DBGO("   New Indicator state: ") */
1623                         /* DBGO(Arg0) */
1624                         /* DBGO("\n") */
1625                 }
1626         } /* End Scope SI */
1627
1628         Mutex (SBX0, 0x00)
1629         OperationRegion (SMB0, SystemIO, 0xB00, 0x0C)
1630                 Field (SMB0, ByteAcc, NoLock, Preserve) {
1631                         HSTS,   8, /* SMBUS status */
1632                         SSTS,   8,  /* SMBUS slave status */
1633                         HCNT,   8,  /* SMBUS control */
1634                         HCMD,   8,  /* SMBUS host cmd */
1635                         HADD,   8,  /* SMBUS address */
1636                         DAT0,   8,  /* SMBUS data0 */
1637                         DAT1,   8,  /* SMBUS data1 */
1638                         BLKD,   8,  /* SMBUS block data */
1639                         SCNT,   8,  /* SMBUS slave control */
1640                         SCMD,   8,  /* SMBUS shaow cmd */
1641                         SEVT,   8,  /* SMBUS slave event */
1642                         SDAT,   8  /* SMBUS slave data */
1643         }
1644
1645         Method (WCLR, 0, NotSerialized) { /* clear SMBUS status register */
1646                 Store (0x1E, HSTS)
1647                 Store (0xFA, Local0)
1648                 While (LAnd (LNotEqual (And (HSTS, 0x1E), Zero), LGreater (Local0, Zero))) {
1649                         Stall (0x64)
1650                         Decrement (Local0)
1651                 }
1652
1653                 Return (Local0)
1654         }
1655
1656         Method (SWTC, 1, NotSerialized) {
1657                 Store (Arg0, Local0)
1658                 Store (0x07, Local2)
1659                 Store (One, Local1)
1660                 While (LEqual (Local1, One)) {
1661                         Store (And (HSTS, 0x1E), Local3)
1662                         If (LNotEqual (Local3, Zero)) { /* read sucess */
1663                                 If (LEqual (Local3, 0x02)) {
1664                                         Store (Zero, Local2)
1665                                 }
1666
1667                                 Store (Zero, Local1)
1668                         }
1669                         Else {
1670                                 If (LLess (Local0, 0x0A)) { /* read failure */
1671                                         Store (0x10, Local2)
1672                                         Store (Zero, Local1)
1673                                 }
1674                                 Else {
1675                                         Sleep (0x0A) /* 10 ms, try again */
1676                                         Subtract (Local0, 0x0A, Local0)
1677                                 }
1678                         }
1679                 }
1680
1681                 Return (Local2)
1682         }
1683
1684         Method (SMBR, 3, NotSerialized) {
1685                 Store (0x07, Local0)
1686                 If (LEqual (Acquire (SBX0, 0xFFFF), Zero)) {
1687                         Store (WCLR (), Local0) /* clear SMBUS status register before read data */
1688                         If (LEqual (Local0, Zero)) {
1689                                 Release (SBX0)
1690                                 Return (0x0)
1691                         }
1692
1693                         Store (0x1F, HSTS)
1694                         Store (Or (ShiftLeft (Arg1, One), One), HADD)
1695                         Store (Arg2, HCMD)
1696                         If (LEqual (Arg0, 0x07)) {
1697                                 Store (0x48, HCNT) /* read byte */
1698                         }
1699
1700                         Store (SWTC (0x03E8), Local1) /* 1000 ms */
1701                         If (LEqual (Local1, Zero)) {
1702                                 If (LEqual (Arg0, 0x07)) {
1703                                         Store (DAT0, Local0)
1704                                 }
1705                         }
1706                         Else {
1707                                 Store (Local1, Local0)
1708                         }
1709
1710                         Release (SBX0)
1711                 }
1712
1713                 /* DBGO("the value of SMBusData0 register ") */
1714                 /* DBGO(Arg2) */
1715                 /* DBGO(" is ") */
1716                 /* DBGO(Local0) */
1717                 /* DBGO("\n") */
1718
1719                 Return (Local0)
1720         }
1721
1722         /* THERMAL */
1723         Scope(\_TZ) {
1724                 Name (KELV, 2732)
1725                 Name (THOT, 800)
1726                 Name (TCRT, 850)
1727
1728                 ThermalZone(TZ00) {
1729                         Method(_AC0,0) {        /* Active Cooling 0 (0=highest fan speed) */
1730                                 /* DBGO("\\_TZ\\TZ00\\_AC0\n") */
1731                                 Return(Add(0, 2730))
1732                         }
1733                         Method(_AL0,0) {        /* Returns package of cooling device to turn on */
1734                                 /* DBGO("\\_TZ\\TZ00\\_AL0\n") */
1735                                 Return(Package() {\_TZ.TZ00.FAN0})
1736                         }
1737                         Device (FAN0) {
1738                                 Name(_HID, EISAID("PNP0C0B"))
1739                                 Name(_PR0, Package() {PFN0})
1740                         }
1741
1742                         PowerResource(PFN0,0,0) {
1743                                 Method(_STA) {
1744                                         Store(0xF,Local0)
1745                                         Return(Local0)
1746                                 }
1747                                 Method(_ON) {
1748                                         /* DBGO("\\_TZ\\TZ00\\FAN0 _ON\n") */
1749                                 }
1750                                 Method(_OFF) {
1751                                         /* DBGO("\\_TZ\\TZ00\\FAN0 _OFF\n") */
1752                                 }
1753                         }
1754
1755                         Method(_HOT,0) {        /* return hot temp in tenths degree Kelvin */
1756                                 /* DBGO("\\_TZ\\TZ00\\_HOT\n") */
1757                                 Return (Add (THOT, KELV))
1758                         }
1759                         Method(_CRT,0) {        /* return critical temp in tenths degree Kelvin */
1760                                 /* DBGO("\\_TZ\\TZ00\\_CRT\n") */
1761                                 Return (Add (TCRT, KELV))
1762                         }
1763                         Method(_TMP,0) {        /* return current temp of this zone */
1764                                 Store (SMBR (0x07, 0x4C,, 0x00), Local0)
1765                                 If (LGreater (Local0, 0x10)) {
1766                                         Store (Local0, Local1)
1767                                 }
1768                                 Else {
1769                                         Add (Local0, THOT, Local0)
1770                                         Return (Add (400, KELV))
1771                                 }
1772
1773                                 Store (SMBR (0x07, 0x4C, 0x01), Local0)
1774                                 /* only the two MSBs in the external temperature low byte are used, resolution 0.25. We ignore it */
1775                                 /* Store (SMBR (0x07, 0x4C, 0x10), Local2) */
1776                                 If (LGreater (Local0, 0x10)) {
1777                                         If (LGreater (Local0, Local1)) {
1778                                                 Store (Local0, Local1)
1779                                         }
1780
1781                                         Multiply (Local1, 10, Local1)
1782                                         Return (Add (Local1, KELV))
1783                                 }
1784                                 Else {
1785                                         Add (Local0, THOT, Local0)
1786                                         Return (Add (400 , KELV))
1787                                 }
1788                         } /* end of _TMP */
1789                 } /* end of TZ00 */
1790         }
1791 }
1792 /* End of ASL file */