1 #include <console/console.h>
2 #include <arch/smp/mpspec.h>
3 #include <arch/ioapic.h>
4 #include <device/pci.h>
8 static void *smp_write_config_table(void *v)
10 struct mp_config_table *mc;
12 unsigned char bus_8131_1;
13 unsigned char bus_8131_2;
14 unsigned char bus_8111_1;
16 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
18 mptable_init(mc, "DK8X ", LAPIC_ADDR);
20 smp_write_processors(mc);
26 dev = dev_find_slot(1, PCI_DEVFN(0x03,0));
28 bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
31 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
35 dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
37 bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
40 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
44 dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
46 bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
49 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
54 mptable_write_buses(mc, NULL, &bus_isa);
57 smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
62 dev = dev_find_slot(1, PCI_DEVFN(0x01,1));
64 res = find_resource(dev, PCI_BASE_ADDRESS_0);
66 smp_write_ioapic(mc, 0x03, 0x11, res->base);
70 dev = dev_find_slot(1, PCI_DEVFN(0x02,1));
72 res = find_resource(dev, PCI_BASE_ADDRESS_0);
74 smp_write_ioapic(mc, 0x04, 0x11, res->base);
79 mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
81 /* Standard local interrupt assignments */
82 smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
83 bus_isa, 0x00, MP_APIC_ALL, 0x00);
84 smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
85 bus_isa, 0x00, MP_APIC_ALL, 0x01);
89 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
90 bus_8131_2, (1<<2)|0, 0x02, 0x11);
91 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
92 bus_8131_2, (1<<2)|1, 0x02, 0x12);
93 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
94 bus_8131_2, (1<<2)|2, 0x02, 0x13);
95 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
96 bus_8131_2, (1<<2)|3, 0x02, 0x10);
99 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
100 bus_8131_2, (2<<2)|0, 0x02, 0x12);
101 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
102 bus_8131_2, (2<<2)|1, 0x02, 0x13);
103 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
104 bus_8131_2, (2<<2)|2, 0x02, 0x10);
105 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
106 bus_8131_2, (2<<2)|3, 0x02, 0x11);
109 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
110 bus_8131_1, (1<<2)|0, 0x02, 0x11);
111 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
112 bus_8131_1, (1<<2)|1, 0x02, 0x12);
113 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
114 bus_8131_1, (1<<2)|2, 0x02, 0x13);
115 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
116 bus_8131_1, (1<<2)|3, 0x02, 0x10);
119 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
120 bus_8131_1, (2<<2)|0, 0x02, 0x12);
121 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
122 bus_8131_1, (2<<2)|1, 0x02, 0x13);
123 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
124 bus_8131_1, (2<<2)|2, 0x02, 0x10);
125 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
126 bus_8131_1, (2<<2)|3, 0x02, 0x11);
129 // FIXME get the irqs right, it's just hacked to work for now
130 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
131 bus_8111_1, (5<<2)|0, 0x02, 0x11);
132 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
133 bus_8111_1, (5<<2)|1, 0x02, 0x12);
134 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
135 bus_8111_1, (5<<2)|2, 0x02, 0x13);
136 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
137 bus_8111_1, (5<<2)|3, 0x02, 0x10);
140 // FIXME get the irqs right, it's just hacked to work for now
141 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
142 bus_8111_1, (4<<2)|0, 0x02, 0x10);
143 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
144 bus_8111_1, (4<<2)|1, 0x02, 0x11);
145 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
146 bus_8111_1, (4<<2)|2, 0x02, 0x12);
147 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
148 bus_8111_1, (4<<2)|3, 0x02, 0x13);
151 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
152 bus_8131_1, (3<<2)|0, 0x02, 0x13);
153 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
154 bus_8131_1, (4<<2)|0, 0x02, 0x13);
156 /* There is no extension information... */
158 /* Compute the checksums */
159 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
160 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
161 printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
162 mc, smp_next_mpe_entry(mc));
163 return smp_next_mpe_entry(mc);
166 unsigned long write_smp_table(unsigned long addr)
169 v = smp_write_floating_table(addr);
170 return (unsigned long)smp_write_config_table(v);