src/mainboard/intel/xe7501devkit/romstage.c

   1 #include <stdint.h>
   2 #include <device/pci_def.h>
   3 #include <arch/io.h>
   4 #include <device/pnp_def.h>
   5 #include <arch/romcc_io.h>
   6 #include <cpu/x86/lapic.h>
   7 #include <arch/cpu.h>
   8 #include <stdlib.h>
   9 #include <pc80/mc146818rtc.h>
  10 #include <console/console.h>
  11 #include "lib/ramtest.c"
  12 #include "southbridge/intel/i82801cx/i82801cx_early_smbus.c"
  13 #include "northbridge/intel/e7501/raminit.h"
  14 #include "cpu/x86/lapic/boot_cpu.c"
  15 #include "northbridge/intel/e7501/debug.c"
  16 #include "superio/smsc/lpc47b272/lpc47b272_early_serial.c"
  17 #include "cpu/x86/mtrr/earlymtrr.c"
  18 #include "cpu/x86/bist.h"
  19 #include <spd.h>
  20
  21 #define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1)
  22
  23 static void hard_reset(void)
  24 {
  25         outb(0x0e, 0x0cf9);
  26 }
  27
  28 static inline int spd_read_byte(unsigned device, unsigned address)
  29 {
  30         return smbus_read_byte(device, address);
  31 }
  32
  33 #include "northbridge/intel/e7501/raminit.c"
  34 #include "northbridge/intel/e7501/reset_test.c"
  35 #include "lib/generic_sdram.c"
  36
  37 // This function MUST appear last (ROMCC limitation)
  38 static void main(unsigned long bist)
  39 {
  40         static const struct mem_controller memctrl[] = {
  41                 {
  42                         .d0 = PCI_DEV(0, 0, 0),
  43                         .d0f1 = PCI_DEV(0, 0, 1),
  44                         .channel0 = { DIMM0, DIMM1, DIMM2, 0 },
  45                         .channel1 = { DIMM4, DIMM5, DIMM6, 0 },
  46                 },
  47         };
  48
  49         if (bist == 0) {
  50                 // Skip this if there was a built in self test failure
  51                 early_mtrr_init();
  52                 enable_lapic();
  53         }
  54
  55         // Get the serial port running and print a welcome banner
  56         lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
  57         uart_init();
  58         console_init();
  59
  60         // Halt if there was a built in self test failure
  61         report_bist_failure(bist);
  62
  63         // print_pci_devices();
  64
  65         // If this is a warm boot, some initialization can be skipped
  66
  67         if (!bios_reset_detected())
  68         {
  69                 enable_smbus();
  70                 // dump_spd_registers(&memctrl[0]);
  71                 // dump_smbus_registers();
  72                 sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
  73         }
  74
  75         // NOTE: ROMCC dies with an internal compiler error
  76         //               if the following line is removed.
  77         print_debug("SDRAM is up.\n");
  78 }