2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Arastra, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
21 #include <arch/smp/mpspec.h>
22 #include <arch/ioapic.h>
23 #include <device/pci.h>
27 static void *smp_write_config_table(void *v)
29 struct mp_config_table *mc;
36 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
38 mptable_init(mc, LOCAL_APIC_ADDR);
40 smp_write_processors(mc);
43 dev = dev_find_slot(0, PCI_DEVFN(0x04,0));
45 bus_aioc = pci_read_config8(dev, PCI_SECONDARY_BUS);
48 printk(BIOS_DEBUG, "ERROR - could not find PCI 0:04.0\n");
52 dev = dev_find_slot(0, PCI_DEVFN(0x02,0));
54 bus_pea0 = pci_read_config8(dev, PCI_SECONDARY_BUS);
57 printk(BIOS_DEBUG, "ERROR - could not find PCI 0:02.0\n");
61 dev = dev_find_slot(0, PCI_DEVFN(0x03,0));
63 bus_pea1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
66 printk(BIOS_DEBUG, "ERROR - could not find PCI 0:03.0\n");
70 mptable_write_buses(mc, NULL, &bus_isa);
73 smp_write_ioapic(mc, 0x8, 0x20, IO_APIC_ADDR);
75 mptable_add_isa_interrupts(mc, bus_isa, 0x8, 0);
77 /* Standard local interrupt assignments */
78 mptable_lintsrc(mc, bus_isa);
80 /* IMCH/IICH PCI devices */
81 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
82 0, (0x01<<2)|0, 0x8, 0x10); /* DMA controller */
83 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
84 0, (0x02<<2)|0, 0x8, 0x10); /* PCIe port A bridge */
85 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
86 0, (0x03<<2)|0, 0x8, 0x10); /* PCIe port A1 bridge */
87 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
88 0, (0x04<<2)|0, 0x8, 0x10); /* AIOC PCI bridge */
89 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
90 0, (0x1d<<2)|0, 0x8, 0x10); /* UHCI/EHCI */
91 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
92 0, (0x1f<<2)|1, 0x8, 0x11); /* SATA/SMBus */
96 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
97 bus_pea0, (0<<2)|0, 0x8, 0x10);
98 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
99 bus_pea0, (0<<2)|1, 0x8, 0x11);
100 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
101 bus_pea0, (0<<2)|2, 0x8, 0x12);
102 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
103 bus_pea0, (0<<2)|3, 0x8, 0x13);
108 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
109 bus_pea1, (0<<2)|0, 0x8, 0x10);
110 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
111 bus_pea1, (0<<2)|1, 0x8, 0x11);
112 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
113 bus_pea1, (0<<2)|2, 0x8, 0x12);
114 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
115 bus_pea1, (0<<2)|3, 0x8, 0x13);
119 /* AIOC PCI devices */
120 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
121 bus_aioc, (0<<2)|0, 0x8, 0x10); /* GbE0 */
122 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
123 bus_aioc, (1<<2)|0, 0x8, 0x11); /* GbE1 */
124 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
125 bus_aioc, (2<<2)|0, 0x8, 0x12); /* GbE2 */
128 /* There is no extension information... */
130 /* Compute the checksums */
131 return mptable_finalize(mc);
134 unsigned long write_smp_table(unsigned long addr)
137 v = smp_write_floating_table(addr, 0);
138 return (unsigned long)smp_write_config_table(v);