2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Arastra, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 /* This code is based on src/mainboard/intel/jarrell/mptable.c */
22 #include <console/console.h>
23 #include <arch/smp/mpspec.h>
24 #include <arch/ioapic.h>
25 #include <device/pci.h>
29 static void *smp_write_config_table(void *v)
31 struct mp_config_table *mc;
36 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
38 mptable_init(mc, LAPIC_ADDR);
40 smp_write_processors(mc);
42 mptable_write_buses(mc, NULL, &bus_isa);
45 smp_write_ioapic(mc, 0x01, 0x20, IO_APIC_ADDR);
47 mptable_add_isa_interrupts(mc, bus_isa, 0x1, 0);
49 /* Standard local interrupt assignments */
50 mptable_lintsrc(mc, bus_isa);
52 /* Internal PCI devices */
53 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
54 0, (0x01<<2)|0, 0x01, 0x10); /* DMA controller */
55 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
56 0, (0x02<<2)|0, 0x01, 0x10); /* PCIe port A */
57 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
58 0, (0x03<<2)|0, 0x01, 0x10); /* PCIe port A1 */
59 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
60 0, (0x1c<<2)|0, 0x01, 0x10); /* PCIe port B0 */
61 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
62 0, (0x1c<<2)|1, 0x01, 0x11); /* PCIe port B1 */
63 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
64 0, (0x1c<<2)|2, 0x01, 0x12); /* PCIe port B2 */
65 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
66 0, (0x1c<<2)|3, 0x01, 0x13); /* PCIe port B3 */
67 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
68 0, (0x1d<<2)|0, 0x01, 0x10); /* UHCI0/EHCI */
69 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
70 0, (0x1d<<2)|1, 0x01, 0x11); /* UHCI1 */
71 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
72 0, (0x1e<<2)|0, 0x01, 0x10); /* Audio */
73 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
74 0, (0x1e<<2)|1, 0x01, 0x11); /* Modem */
75 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
76 0, (0x1f<<2)|1, 0x01, 0x11); /* SATA/SMBus */
77 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
78 0, (0x1f<<2)|3, 0x01, 0x13); /* ? */
81 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
82 bus_pci, 0x00, 0x01, 0x10);
83 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
84 bus_pci, 0x01, 0x01, 0x11);
85 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
86 bus_pci, 0x02, 0x01, 0x12);
87 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
88 bus_pci, 0x03, 0x01, 0x13);
90 /* PCIe port A slot */
91 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
92 bus_pcie_a, 0x00, 0x01, 0x10);
93 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
94 bus_pcie_a, 0x01, 0x01, 0x11);
95 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
96 bus_pcie_a, 0x02, 0x01, 0x12);
97 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
98 bus_pcie_a, 0x03, 0x01, 0x13);
100 /* There is no extension information... */
102 /* Compute the checksums */
103 return mptable_finalize(mc);
106 unsigned long write_smp_table(unsigned long addr)
109 v = smp_write_floating_table(addr, 0);
110 return (unsigned long)smp_write_config_table(v);