2 * This file is part of the coreboot project.
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 /* This file defines the processor and performance state capability
21 * for each core in the system. It is included into the DSDT for each
22 * core. It assumes that each core of the system has the same performance
26 DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001)
29 Processor(CPU0,0,0x808,0x06) {
30 #include "cpstate.asl"
32 Processor(CPU1,1,0x0,0x0) {
33 #include "cpstate.asl"
35 Processor(CPU2,2,0x0,0x0) {
36 #include "cpstate.asl"
38 Processor(CPU3,3,0x0,0x0) {
39 #include "cpstate.asl"
43 /* P-state support: The maximum number of P-states supported by the */
44 /* CPUs we'll use is 6. */
45 /* Get from AMI BIOS. */
69 ResourceTemplate(){Register(FFixedHW, 0, 0, 0)},
70 ResourceTemplate(){Register(FFixedHW, 0, 0, 0)}