2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2007-2008 coresystems GmbH
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; version 2 of the License.
10 ## This program is distributed in the hope that it will be useful,
11 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
12 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 ## GNU General Public License for more details.
15 ## You should have received a copy of the GNU General Public License
16 ## along with this program; if not, write to the Free Software
17 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 config BOARD_SPECIFIC_OPTIONS # dummy
25 select CPU_INTEL_SOCKET_MFCPGA478
26 select NORTHBRIDGE_INTEL_I945GM
27 select SOUTHBRIDGE_INTEL_I82801GX
28 select SOUTHBRIDGE_TI_PCIXX12
29 select SUPERIO_SMSC_FDC37N972
30 select SUPERIO_SMSC_SIO10N268
32 select HAVE_ACPI_TABLES
33 select HAVE_PIRQ_TABLE
35 select HAVE_OPTION_TABLE
36 select HAVE_ACPI_RESUME
39 select AP_IN_SIPI_WAIT
41 select HAVE_SMI_HANDLER
42 select BOARD_ROMSIZE_KB_1024
46 select CHANNEL_XOR_RANDOMIZATION
52 config DCACHE_RAM_BASE
56 config DCACHE_RAM_SIZE
60 config MAINBOARD_PART_NUMBER
64 config MMCONF_BASE_ADDRESS
76 config MAX_PHYSICAL_CPUS
80 config FALLBACK_VGA_BIOS_FILE
82 default "getac-pci8086,27a2.rom"
84 endif # BOARD_GETAC_P470