2 ## Config file for the Embedded Planet EP405PC Computing Engine
14 uses HAVE_OPTION_TABLE
16 uses CONFIG_CHIP_CONFIGURE
17 uses DEFAULT_CONSOLE_LOGLEVEL
19 uses CONFIG_CONSOLE_SERIAL8250
20 uses TTYS0_BAUD TTYS0_DIV
23 uses CONFIG_FS_PAYLOAD
25 uses CONFIG_FS_ISO9660
27 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
28 uses CONFIG_PRECOMPRESSED_PAYLOAD
30 uses CONFIG_SYS_CLK_FREQ
36 uses _EXCEPTION_VECTORS
41 uses EMBEDDED_RAM_SIZE
42 uses STACK_SIZE HEAP_SIZE
46 uses MAINBOARD_PART_NUMBER
47 uses LINUXBIOS_EXTRA_VERSION
54 ## Set PCI configuration register addresses
56 default PCIC0_CFGADDR=0xeec00000
57 default PCIC0_CFGDATA=0xeec00004
60 ## Set PCI/ISA I/O and memory base address
62 default ISA_IO_BASE=0xe8000000
63 default ISA_MEM_BASE=0x80000000
64 default _IO_BASE=ISA_IO_BASE
67 ## HACK ALERT: the UART0 registers are not in the PCI I/O address space
68 ## but both IDE and UART use the same routines for I/O (inb/outb). To get
69 ## around this we set TTYSO_BASE to the difference between the two.
71 default TTYS0_BASE=0xef600300-ISA_IO_BASE
73 ## Enable PPC405 instructions
74 default CPU_OPT="-mcpu=405"
77 ## Use stage 1 initialization code
78 default CONFIG_USE_INIT=1
80 ## Use chip configuration
81 default CONFIG_CHIP_CONFIGURE=1
83 ## We don't use compressed image
84 default CONFIG_COMPRESS=0
86 ## Turn off POST codes
89 ## Enable serial console
90 default DEFAULT_CONSOLE_LOGLEVEL=8
91 default CONFIG_CONSOLE_SERIAL8250=1
92 # Divisor of 69 == 9600 baud due to weird clocking
94 default TTYS0_BAUD=9600
96 ## Boot linux from IDE
98 default CONFIG_FS_PAYLOAD=1
99 default CONFIG_FS_EXT2=1
100 default CONFIG_FS_ISO9660=1
101 default CONFIG_FS_FAT=1
102 default AUTOBOOT_CMDLINE="hda1:/vmlinuz"
104 default ROM_SIZE=1048576
106 ## Board has fixed size RAM
107 default EMBEDDED_RAM_SIZE=64*1024*1024
109 ## LinuxBIOS C code runs at this location in RAM
110 default _RAMBASE=0x00100000
115 default STACK_SIZE=0x10000
120 default HEAP_SIZE=0x10000
125 default CONFIG_SYS_CLK_FREQ=33
128 default _ROMBASE=0xfff00000
130 ## Reset vector address
131 default _RESET=0xfffffffc
134 default _EXCEPTION_VECTORS=_ROMBASE+0x100
136 ## linuxBIOS ROM start address
137 default _ROMSTART=0xfff03000
139 ## linuxBIOS C code runs at this location in RAM
140 default _RAMBASE=0x00100000