1 uses CONFIG_HAVE_MP_TABLE
2 uses CONFIG_HAVE_PIRQ_TABLE
3 uses CONFIG_USE_FALLBACK_IMAGE
4 uses CONFIG_HAVE_FALLBACK_BOOT
5 uses CONFIG_HAVE_HARD_RESET
6 uses CONFIG_HAVE_OPTION_TABLE
7 uses CONFIG_USE_OPTION_TABLE
8 uses CONFIG_ROM_PAYLOAD
9 uses CONFIG_IRQ_SLOT_COUNT
11 uses CONFIG_MAINBOARD_VENDOR
12 uses CONFIG_MAINBOARD_PART_NUMBER
13 uses COREBOOT_EXTRA_VERSION
15 uses CONFIG_FALLBACK_SIZE
16 uses CONFIG_STACK_SIZE
19 uses CONFIG_ROM_SECTION_SIZE
20 uses CONFIG_ROM_IMAGE_SIZE
21 uses CONFIG_ROM_SECTION_SIZE
22 uses CONFIG_ROM_SECTION_OFFSET
23 uses CONFIG_ROM_PAYLOAD_START
24 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
25 uses CONFIG_PRECOMPRESSED_PAYLOAD
26 uses CONFIG_PAYLOAD_SIZE
29 uses CONFIG_XIP_ROM_SIZE
30 uses CONFIG_XIP_ROM_BASE
31 uses CONFIG_HAVE_MP_TABLE
32 uses CONFIG_CROSS_COMPILE
36 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
37 uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
38 uses CONFIG_CONSOLE_SERIAL8250
39 uses CONFIG_TTYS0_BAUD
40 uses CONFIG_TTYS0_BASE
42 uses CONFIG_UDELAY_TSC
43 uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
45 uses CONFIG_PIRQ_ROUTE
47 ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
48 default CONFIG_ROM_SIZE = 256*1024
55 ## Build code for the fallback boot
57 default CONFIG_HAVE_FALLBACK_BOOT=1
62 default CONFIG_HAVE_MP_TABLE=0
65 ## Build code to reset the motherboard from coreboot
67 default CONFIG_HAVE_HARD_RESET=0
69 ## Delay timer options
71 default CONFIG_UDELAY_TSC=1
72 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
75 ## Build code to export a programmable irq routing table
77 default CONFIG_HAVE_PIRQ_TABLE=1
78 default CONFIG_IRQ_SLOT_COUNT=2
79 default CONFIG_PIRQ_ROUTE=1
83 ## Build code to export a CMOS option table
85 default CONFIG_HAVE_OPTION_TABLE=0
88 ### coreboot layout values
91 ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
92 default CONFIG_ROM_IMAGE_SIZE = 65536
93 default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
96 ## Use a small 8K stack
98 default CONFIG_STACK_SIZE=0x2000
101 ## Use a small 16K heap
103 default CONFIG_HEAP_SIZE=0x4000
106 ## Only use the option table in a normal image
108 #default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
109 default CONFIG_USE_OPTION_TABLE = 0
111 default CONFIG_RAMBASE = 0x00004000
113 default CONFIG_ROM_PAYLOAD = 1
116 ## The default compiler
118 default CONFIG_CROSS_COMPILE=""
119 default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
123 ## The Serial Console
126 # To Enable the Serial Console
127 default CONFIG_CONSOLE_SERIAL8250=1
129 ## Select the serial console baud rate
130 default CONFIG_TTYS0_BAUD=115200
131 #default CONFIG_TTYS0_BAUD=57600
132 #default CONFIG_TTYS0_BAUD=38400
133 #default CONFIG_TTYS0_BAUD=19200
134 #default CONFIG_TTYS0_BAUD=9600
135 #default CONFIG_TTYS0_BAUD=4800
136 #default CONFIG_TTYS0_BAUD=2400
137 #default CONFIG_TTYS0_BAUD=1200
139 # Select the serial console base port
140 default CONFIG_TTYS0_BASE=0x3f8
142 # Select the serial protocol
143 # This defaults to 8 data bits, 1 stop bit, and no parity
144 default CONFIG_TTYS0_LCS=0x3
147 ### Select the coreboot loglevel
149 ## EMERG 1 system is unusable
150 ## ALERT 2 action must be taken immediately
151 ## CRIT 3 critical conditions
152 ## ERR 4 error conditions
153 ## WARNING 5 warning conditions
154 ## NOTICE 6 normal but significant condition
155 ## INFO 7 informational
156 ## CONFIG_DEBUG 8 debug-level messages
157 ## SPEW 9 Way too many details
159 ## Request this level of debugging output
160 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
161 ## At a maximum only compile in this level of debugging
162 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
164 default CONFIG_VIDEO_MB = 0