1 uses CONFIG_HAVE_MP_TABLE
3 uses CONFIG_HAVE_PIRQ_TABLE
4 uses CONFIG_USE_FALLBACK_IMAGE
5 uses CONFIG_HAVE_FALLBACK_BOOT
6 uses CONFIG_HAVE_HARD_RESET
7 uses CONFIG_HAVE_OPTION_TABLE
8 uses CONFIG_USE_OPTION_TABLE
9 uses CONFIG_ROM_PAYLOAD
10 uses CONFIG_IRQ_SLOT_COUNT
12 uses CONFIG_MAINBOARD_VENDOR
13 uses CONFIG_MAINBOARD_PART_NUMBER
14 uses COREBOOT_EXTRA_VERSION
16 uses CONFIG_FALLBACK_SIZE
17 uses CONFIG_STACK_SIZE
20 uses CONFIG_ROM_SECTION_SIZE
21 uses CONFIG_ROM_IMAGE_SIZE
22 uses CONFIG_ROM_SECTION_SIZE
23 uses CONFIG_ROM_SECTION_OFFSET
24 uses CONFIG_ROM_PAYLOAD_START
25 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
26 uses CONFIG_PRECOMPRESSED_PAYLOAD
27 uses CONFIG_PAYLOAD_SIZE
30 uses CONFIG_XIP_ROM_SIZE
31 uses CONFIG_XIP_ROM_BASE
32 uses CONFIG_HAVE_MP_TABLE
33 uses CONFIG_CROSS_COMPILE
37 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
38 uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
39 uses CONFIG_CONSOLE_SERIAL8250
40 uses CONFIG_TTYS0_BAUD
41 uses CONFIG_TTYS0_BASE
43 uses CONFIG_UDELAY_TSC
44 uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
46 uses CONFIG_PIRQ_ROUTE
48 ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
49 default CONFIG_ROM_SIZE = 256*1024
56 ## Build code for the fallback boot
58 default CONFIG_HAVE_FALLBACK_BOOT=1
63 default CONFIG_HAVE_MP_TABLE=0
66 ## Build code to reset the motherboard from coreboot
68 default CONFIG_HAVE_HARD_RESET=0
70 ## Delay timer options
72 default CONFIG_UDELAY_TSC=1
73 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
76 ## Build code to export a programmable irq routing table
78 default CONFIG_HAVE_PIRQ_TABLE=1
79 default CONFIG_IRQ_SLOT_COUNT=2
80 default CONFIG_PIRQ_ROUTE=1
84 ## Build code to export a CMOS option table
86 default CONFIG_HAVE_OPTION_TABLE=0
89 ### coreboot layout values
92 ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
93 default CONFIG_ROM_IMAGE_SIZE = 65536
94 default CONFIG_FALLBACK_SIZE = 131072
97 ## Use a small 8K stack
99 default CONFIG_STACK_SIZE=0x2000
102 ## Use a small 16K heap
104 default CONFIG_HEAP_SIZE=0x4000
107 ## Only use the option table in a normal image
109 #default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
110 default CONFIG_USE_OPTION_TABLE = 0
112 default CONFIG_RAMBASE = 0x00004000
114 default CONFIG_ROM_PAYLOAD = 1
117 ## The default compiler
119 default CONFIG_CROSS_COMPILE=""
120 default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
124 ## The Serial Console
127 # To Enable the Serial Console
128 default CONFIG_CONSOLE_SERIAL8250=1
130 ## Select the serial console baud rate
131 default CONFIG_TTYS0_BAUD=115200
132 #default CONFIG_TTYS0_BAUD=57600
133 #default CONFIG_TTYS0_BAUD=38400
134 #default CONFIG_TTYS0_BAUD=19200
135 #default CONFIG_TTYS0_BAUD=9600
136 #default CONFIG_TTYS0_BAUD=4800
137 #default CONFIG_TTYS0_BAUD=2400
138 #default CONFIG_TTYS0_BAUD=1200
140 # Select the serial console base port
141 default CONFIG_TTYS0_BASE=0x3f8
143 # Select the serial protocol
144 # This defaults to 8 data bits, 1 stop bit, and no parity
145 default CONFIG_TTYS0_LCS=0x3
148 ### Select the coreboot loglevel
150 ## EMERG 1 system is unusable
151 ## ALERT 2 action must be taken immediately
152 ## CRIT 3 critical conditions
153 ## ERR 4 error conditions
154 ## WARNING 5 warning conditions
155 ## NOTICE 6 normal but significant condition
156 ## INFO 7 informational
157 ## CONFIG_DEBUG 8 debug-level messages
158 ## SPEW 9 Way too many details
160 ## Request this level of debugging output
161 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
162 ## At a maximum only compile in this level of debugging
163 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
165 default CONFIG_VIDEO_MB = 0
172 default CONFIG_CBFS=0