2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <arch/pirq_routing.h>
21 #include <console/console.h>
23 #include <arch/pirq_routing.h>
24 #include "../../../southbridge/amd/cs5536/cs5536.h"
33 #define M_PIRQA (1 << PIRQA) /* Bitmap of supported IRQs */
34 #define M_PIRQB (1 << PIRQB) /* Bitmap of supported IRQs */
35 #define M_PIRQC (1 << PIRQC) /* Bitmap of supported IRQs */
36 #define M_PIRQD (1 << PIRQD) /* Bitmap of supported IRQs */
39 #define L_PIRQA 1 /* Means Slot INTx# Connects To Chipset INTA# */
40 #define L_PIRQB 2 /* Means Slot INTx# Connects To Chipset INTB# */
41 #define L_PIRQC 3 /* Means Slot INTx# Connects To Chipset INTC# */
42 #define L_PIRQD 4 /* Means Slot INTx# Connects To Chipset INTD# */
44 const struct irq_routing_table intel_irq_routing_table = {
45 PIRQ_SIGNATURE, /* u32 signature */
46 PIRQ_VERSION, /* u16 version */
47 32+16*9, /* There can be total 9 devices on the bus */
48 0x00, /* Where the interrupt router lies (bus) */
49 (0x0f<<3)|0x0, /* Where the interrupt router lies (dev) */
50 0, /* IRQs devoted exclusively to PCI usage */
53 0, /* Crap (miniport) */
54 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
55 0xe, /* u8 checksum. This has to be set to some
56 value that would give 0 after the sum of all
57 bytes for this structure (including checksum) */
59 /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
60 {0x00,(0x01<<3)|0x0, {{0x01, 0x0400}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0},
61 {0x00,(0x0f<<3)|0x0, {{0x01, 0x0400}, {0x02, 0x0800}, {0x03, 0x0400}, {0x04, 0x00800}}, 0x0, 0x0},
62 {0x00,(0x13<<3)|0x0, {{0x01, 0x0400}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0},
63 {0x00,(0x12<<3)|0x0, {{0x03, 0x0400}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0},
64 {0x00,(0x11<<3)|0x0, {{0x01, 0x0400}, {0x02, 0x0800}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0},
65 {0x00,(0x0a<<3)|0x0, {{0x01, 0x0400}, {0x02, 0x0800}, {0x03, 0x0400}, {0x04, 0x00800}}, 0x1, 0x0},
66 {0x00,(0x0b<<3)|0x0, {{0x02, 0x0800}, {0x03, 0x0400}, {0x04, 0x0800}, {0x01, 0x00400}}, 0x2, 0x0},
67 {0x00,(0x0c<<3)|0x0, {{0x03, 0x0400}, {0x04, 0x0800}, {0x01, 0x0400}, {0x02, 0x00800}}, 0x3, 0x0},
68 {0x00,(0x0d<<3)|0x0, {{0x04, 0x0800}, {0x01, 0x0400}, {0x02, 0x0800}, {0x03, 0x00400}}, 0x4, 0x0},
73 unsigned long write_pirq_routing_table(unsigned long addr){
74 int i, j, k, num_entries;
76 uint16_t chipset_irq_map;
77 uint32_t pciAddr, pirtable_end;
78 struct irq_routing_table *pirq_tbl;
80 pirtable_end = copy_pirq_routing_table(addr);
82 /* Set up chipset IRQ steering */
83 pciAddr = 0x80000000 | (CHIPSET_DEV_NUM << 11) | 0x5C;
84 chipset_irq_map = (11 << 12 | 10 << 8 | 11 << 4 | 10);
85 printk_debug("%s(%08X, %04X)\n", __FUNCTION__, pciAddr, chipset_irq_map);
86 outl(pciAddr & ~3, 0xCF8);
87 outl(chipset_irq_map, 0xCFC);
89 pirq_tbl = (struct irq_routing_table *)(addr);
90 num_entries = (pirq_tbl->size - 32)/16;
93 for (i=0; i < num_entries; i++){
94 printk_debug("PIR Entry %d Dev/Fn: %X Slot: %d\n", i, pirq_tbl->slots[i].devfn, pirq_tbl->slots[i].slot);
95 for (j = 0; j < 4; j++){
96 printk_debug("INT: %c bitmap: %x ", 'A'+j, pirq_tbl->slots[i].irq[j].bitmap);
97 for (k = 0; (!((pirq_tbl->slots[i].irq[j].bitmap >> k) & 1)) && (pirq_tbl->slots[i].irq[j].bitmap != 0); k++); /* finds lsb in bitmap to IRQ# */
99 printk_debug("PIRQ: %d\n", k);
101 pci_assign_irqs(pirq_tbl->slots[i].bus, pirq_tbl->slots[i].devfn, pirq); /* bus, device, slots IRQs for {A,B,C,D} */
104 /* put the PIR table in memory and checksum */