5e782ed1b042544808f425451eb40f80acc003d8
[coreboot.git] / src / mainboard / digitallogic / adl855pc / romstage.c
1 #include <stdint.h>
2 #include <device/pci_def.h>
3 #include <arch/io.h>
4 #include <device/pnp_def.h>
5 #include <arch/romcc_io.h>
6 #include <arch/hlt.h>
7 #include <stdlib.h>
8 #include "pc80/udelay_io.c"
9 #include <pc80/mc146818rtc.h>
10 #include <console/console.h>
11 #include "southbridge/intel/i82801dx/i82801dx.h"
12 #include "southbridge/intel/i82801dx/i82801dx_early_smbus.c"
13 #include "northbridge/intel/i855/raminit.h"
14 #include "northbridge/intel/i855/debug.c"
15 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
16 #include "cpu/x86/mtrr/earlymtrr.c"
17 #include "cpu/x86/bist.h"
18 #include <spd.h>
19
20 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
21
22 static inline int spd_read_byte(unsigned device, unsigned address)
23 {
24         return smbus_read_byte(device, address);
25 }
26
27 #include "northbridge/intel/i855/raminit.c"
28 #include "northbridge/intel/i855/reset_test.c"
29 #include "lib/generic_sdram.c"
30
31 void main(unsigned long bist)
32 {
33         static const struct mem_controller memctrl[] = {
34                 {
35                         .d0 = PCI_DEV(0, 0, 1),
36                         .channel0 = { DIMM0, 0 },
37                 },
38         };
39
40         if (bist == 0) {
41 #if 0
42                 enable_lapic();
43                 init_timer();
44 #endif
45         }
46
47         w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
48         uart_init();
49         console_init();
50
51         /* Halt if there was a built in self test failure */
52         report_bist_failure(bist);
53
54 #if 0
55         print_pci_devices();
56 #endif
57
58         if(!bios_reset_detected()) {
59                 enable_smbus();
60 #if 0
61                 dump_spd_registers(&memctrl[0]);
62                 dump_smbus_registers();
63 #endif
64
65                 sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
66
67         }
68
69 #if 0
70         dump_pci_devices();
71         dump_pci_device(PCI_DEV(0, 0, 0));
72
73         // Check all of memory
74         ram_check(0x00000000, msr.lo+(msr.hi<<32));
75         // Check 16MB of memory @ 0
76         ram_check(0x00000000, 0x01000000);
77         // Check 16MB of memory @ 2GB
78         ram_check(0x80000000, 0x81000000);
79 #endif
80 }
81