4 uses USE_FALLBACK_IMAGE
5 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_ROM_PAYLOAD
14 uses MAINBOARD_PART_NUMBER
15 uses COREBOOT_EXTRA_VERSION
24 uses ROM_SECTION_OFFSET
25 uses CONFIG_ROM_PAYLOAD_START
26 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
27 uses CONFIG_PRECOMPRESSED_PAYLOAD
39 uses DEFAULT_CONSOLE_LOGLEVEL
40 uses MAXIMUM_CONSOLE_LOGLEVEL
41 default DEFAULT_CONSOLE_LOGLEVEL=9
42 default MAXIMUM_CONSOLE_LOGLEVEL=9
43 ## ROM_SIZE is the size of boot ROM that this board will use.
44 default ROM_SIZE = 1024*1024
51 ## Build code for the fallback boot
53 default HAVE_FALLBACK_BOOT=1
58 default HAVE_MP_TABLE=0
61 ## Build code to reset the motherboard from coreboot
63 default HAVE_HARD_RESET=1
66 ## use io based udelay function
68 default CONFIG_UDELAY_IO=1
71 ## Build code to export a programmable irq routing table
73 default HAVE_PIRQ_TABLE=1
74 default IRQ_SLOT_COUNT=5
78 ## Build code to export a CMOS option table
80 default HAVE_OPTION_TABLE=1
83 ### coreboot layout values
86 ## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
87 default ROM_IMAGE_SIZE = 65536
88 default FALLBACK_SIZE = 131072
91 ## Use a small 8K stack
93 default STACK_SIZE=0x2000
96 ## Use a small 16K heap
98 default HEAP_SIZE=0x4000
101 ## Only use the option table in a normal image
103 #default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
104 default USE_OPTION_TABLE = 0
106 default _RAMBASE = 0x00004000
108 default CONFIG_ROM_PAYLOAD = 1
111 ## The default compiler
113 default CC="$(CROSS_COMPILE)gcc -m32"
122 default CONFIG_CBFS=0