4bad57ddd8bd19a639231cef8bb391ff27fb5787
[coreboot.git] / src / mainboard / broadcom / blast / Kconfig
1 if BOARD_BROADCOM_BLAST
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_940
7         select NORTHBRIDGE_AMD_AMDK8
8         select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
9         select SOUTHBRIDGE_BROADCOM_BCM5780
10         select SOUTHBRIDGE_BROADCOM_BCM5785
11         select SUPERIO_NSC_PC87417
12         select HAVE_BUS_CONFIG
13         select HAVE_OPTION_TABLE
14         select HAVE_PIRQ_TABLE
15         select HAVE_MP_TABLE
16         select HAVE_HARD_RESET
17         select BOARD_ROMSIZE_KB_512
18         select SB_HT_CHAIN_UNITID_OFFSET_ONLY
19         select QRANK_DIMM_SUPPORT
20
21 config MAINBOARD_DIR
22         string
23         default broadcom/blast
24
25 config DCACHE_RAM_BASE
26         hex
27         default 0xcf000
28
29 config DCACHE_RAM_SIZE
30         hex
31         default 0x01000
32
33 config DCACHE_RAM_GLOBAL_VAR_SIZE
34         hex
35         default 0x0
36
37 config APIC_ID_OFFSET
38         hex
39         default 0x0
40
41 config SB_HT_CHAIN_ON_BUS0
42         int
43         default 1
44
45 config MAINBOARD_PART_NUMBER
46         string
47         default "Blast"
48
49 config MAX_CPUS
50         int
51         default 4
52
53 config MAX_PHYSICAL_CPUS
54         int
55         default 2
56
57 config HT_CHAIN_END_UNITID_BASE
58         hex
59         default 0x1
60
61 config HT_CHAIN_UNITID_BASE
62         hex
63         default 0x6
64
65 config SB_HT_CHAIN_ON_BUS0
66         int
67         default 2
68
69 config IRQ_SLOT_COUNT
70         int
71         default 11
72
73 endif # BOARD_BROADCOM_BLAST