src/mainboard/asus/p2b-d/mptable.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19  */
  20
  21 #include <console/console.h>
  22 #include <arch/smp/mpspec.h>
  23 #include <arch/ioapic.h>
  24 #include <device/pci.h>
  25 #include <string.h>
  26 #include <stdint.h>
  27
  28 static void *smp_write_config_table(void *v)
  29 {
  30         int ioapic_id, ioapic_ver, isa_bus;
  31         struct mp_config_table *mc;
  32
  33         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
  34
  35         mptable_init(mc, "P2B-D       ", LAPIC_ADDR);
  36
  37         smp_write_processors(mc);
  38
  39         mptable_write_buses(mc, NULL, &isa_bus);
  40
  41         ioapic_id = 2;
  42         ioapic_ver = 0x11; /* External Intel 82093AA IOAPIC. */
  43         smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
  44
  45         {
  46                 device_t dev;
  47                 struct resource *res;
  48                 dev = dev_find_slot(1, PCI_DEVFN(0x1e, 0));
  49                 if (dev) {
  50                         res = find_resource(dev, PCI_BASE_ADDRESS_0);
  51                         if (res)
  52                                 smp_write_ioapic(mc, 3, ioapic_ver, res->base);
  53                 }
  54                 dev = dev_find_slot(1, PCI_DEVFN(0x1c, 0));
  55                 if (dev) {
  56                         res = find_resource(dev, PCI_BASE_ADDRESS_0);
  57                         if (res)
  58                                 smp_write_ioapic(mc, 4, ioapic_ver, res->base);
  59                 }
  60                 dev = dev_find_slot(4, PCI_DEVFN(0x1e, 0));
  61                 if (dev) {
  62                         res = find_resource(dev, PCI_BASE_ADDRESS_0);
  63                         if (res)
  64                                 smp_write_ioapic(mc, 5, ioapic_ver, res->base);
  65                 }
  66                 dev = dev_find_slot(4, PCI_DEVFN(0x1c, 0));
  67                 if (dev) {
  68                         res = find_resource(dev, PCI_BASE_ADDRESS_0);
  69                         if (res)
  70                                 smp_write_ioapic(mc, 8, ioapic_ver, res->base);
  71                 }
  72         }
  73
  74         /* Legacy Interrupts */
  75         mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0);
  76
  77         /* I/O Ints:         Type       Trigger                Polarity              Bus ID   IRQ   APIC ID      PIN# */
  78         smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,  0x0,     0x13, ioapic_id,   0x13); /* UHCI */
  79
  80         /* Local Ints:       Type       Trigger                Polarity              Bus ID   IRQ   APIC ID      PIN# */
  81         smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE  | MP_IRQ_POLARITY_HIGH, isa_bus, 0x0,  MP_APIC_ALL, 0x0);
  82         smp_write_lintsrc(mc, mp_NMI,    MP_IRQ_TRIGGER_EDGE  | MP_IRQ_POLARITY_HIGH, isa_bus, 0x0,  MP_APIC_ALL, 0x1);
  83
  84         /* Compute the checksums. */
  85         mc->mpe_checksum =
  86             smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
  87         mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
  88         printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
  89                      mc, smp_next_mpe_entry(mc));
  90         return smp_next_mpe_entry(mc);
  91 }
  92
  93 unsigned long write_smp_table(unsigned long addr)
  94 {
  95         void *v;
  96         v = smp_write_floating_table(addr);
  97         return (unsigned long)smp_write_config_table(v);
  98 }