src/mainboard/asus/m5a99x-evo/acpi/cpstate.asl

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2011 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 /* This file defines the processor and performance state capability
  21  * for each core in the system.  It is included into the DSDT for each
  22  * core.  It assumes that each core of the system has the same performance
  23  * characteristics.
  24 */
  25 /*
  26 DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001)
  27         {
  28                 Scope (\_PR) {
  29                 Processor(CPU0,0,0x808,0x06) {
  30                         #include "cpstate.asl"
  31                 }
  32                 Processor(CPU1,1,0x0,0x0) {
  33                         #include "cpstate.asl"
  34                 }
  35                 Processor(CPU2,2,0x0,0x0) {
  36                         #include "cpstate.asl"
  37                 }
  38                 Processor(CPU3,3,0x0,0x0) {
  39                         #include "cpstate.asl"
  40                 }
  41         }
  42 */
  43         /* P-state support: The maximum number of P-states supported by the */
  44         /* CPUs we'll use is 6. */
  45         /* Get from AMI BIOS. */
  46         Name(_PSS, Package(){
  47                 Package ()
  48                 {
  49                     0x00000AF0,
  50                     0x0000BF81,
  51                     0x00000002,
  52                     0x00000002,
  53                     0x00000000,
  54                     0x00000000
  55                 },
  56
  57                 Package ()
  58                 {
  59                     0x00000578,
  60                     0x000076F2,
  61                     0x00000002,
  62                     0x00000002,
  63                     0x00000001,
  64                     0x00000001
  65                 }
  66         })
  67
  68         Name(_PCT, Package(){
  69                 ResourceTemplate(){Register(FFixedHW, 0, 0, 0)},
  70                 ResourceTemplate(){Register(FFixedHW, 0, 0, 0)}
  71         })
  72
  73         Method(_PPC, 0){
  74                 Return(0)
  75         }