Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git] / src / mainboard / asus / m2v / Kconfig
1 if BOARD_ASUS_M2V
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_AM2
7         select DIMM_DDR2
8         select QRANK_DIMM_SUPPORT
9         select HAVE_OPTION_TABLE
10         select K8_HT_FREQ_1G_SUPPORT
11         select NORTHBRIDGE_AMD_AMDK8
12         select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
13         select SOUTHBRIDGE_VIA_VT8237R
14         select SOUTHBRIDGE_VIA_K8T890
15         select SUPERIO_ITE_IT8712F
16         select BOARD_ROMSIZE_KB_512
17         select RAMINIT_SYSINFO
18         select TINY_BOOTBLOCK
19         select HAVE_ACPI_RESUME
20         select HAVE_PIRQ_TABLE
21         select PIRQ_ROUTE
22         select HAVE_ACPI_TABLES
23         select HAVE_MP_TABLE
24         select SET_FIDVID
25
26 config MAINBOARD_DIR
27         string
28         default asus/m2v
29
30 config DCACHE_RAM_BASE
31         hex
32         default 0xcc000
33
34 config DCACHE_RAM_SIZE
35         hex
36         default 0x4000
37
38 config DCACHE_RAM_GLOBAL_VAR_SIZE
39         hex
40         default 0x1000
41
42 config APIC_ID_OFFSET
43         hex
44         default 0x10
45
46 config SB_HT_CHAIN_ON_BUS0
47         int
48         default 1
49
50 config MAINBOARD_PART_NUMBER
51         string
52         default "M2V"
53
54 config HW_MEM_HOLE_SIZEK
55         hex
56         default 0
57
58 config MAX_CPUS
59         int
60         default 2
61
62 config MAX_PHYSICAL_CPUS
63         int
64         default 1
65
66 config HEAP_SIZE
67         hex
68         default 0x40000
69
70 config HT_CHAIN_END_UNITID_BASE
71         hex
72         default 0x20
73
74 config HT_CHAIN_UNITID_BASE
75         hex
76         default 0x0
77
78 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
79         hex
80         default 0x1043
81
82 config IRQ_SLOT_COUNT
83         int
84         default 14
85
86 endif # BOARD_ASUS_M2V