61e98bbf0269f271bec7417a9e196cdf72510076
[coreboot.git] / src / mainboard / asus / m2v-mx_se / fadt.c
1 /*
2  * This file is part of the coreboot project.
3  *
4  * Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com>
5  * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
20  */
21
22 #include <string.h>
23 #include <arch/acpi.h>
24 #include <../../../southbridge/via/vt8237r/vt8237r.h>
25
26 /**
27  * Create the Fixed ACPI Description Tables (FADT) for this board.
28  */
29 void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
30 {
31         acpi_header_t *header = &(fadt->header);
32
33         memset((void *) fadt, 0, sizeof(acpi_fadt_t));
34         memcpy(header->signature, "FACP", 4);
35         header->length = 244;
36         header->revision = 1;
37         memcpy(header->oem_id, "COREBO", 6);
38         memcpy(header->oem_table_id, "COREBOOT", 8);
39         memcpy(header->asl_compiler_id, "IASL", 4);
40         header->asl_compiler_revision = 0;
41
42         fadt->firmware_ctrl = facs;
43         fadt->dsdt = dsdt;
44         fadt->preferred_pm_profile = 0;
45         fadt->sci_int = 9;
46         fadt->smi_cmd = 0;
47         fadt->acpi_enable = 0;
48         fadt->acpi_disable = 0;
49         fadt->s4bios_req = 0x0;
50         fadt->pstate_cnt = 0x0;
51
52         fadt->pm1a_evt_blk = VT8237R_ACPI_IO_BASE;
53         fadt->pm1b_evt_blk = 0x0;
54         fadt->pm1a_cnt_blk = VT8237R_ACPI_IO_BASE + 0x4;
55         fadt->pm1b_cnt_blk = 0x0;
56         fadt->pm2_cnt_blk = 0x0;
57         fadt->pm_tmr_blk = VT8237R_ACPI_IO_BASE + 0x8;
58         fadt->gpe0_blk = VT8237R_ACPI_IO_BASE + 0x20;
59         fadt->gpe1_blk = 0x0;
60
61         fadt->pm1_evt_len = 4;
62         fadt->pm1_cnt_len = 2;
63         fadt->pm2_cnt_len = 0;
64         fadt->pm_tmr_len = 4;
65         fadt->gpe0_blk_len = 4;
66         fadt->gpe1_blk_len = 0;
67         fadt->gpe1_base = 0;
68         fadt->cst_cnt = 0;
69         fadt->p_lvl2_lat = 90;
70         fadt->p_lvl3_lat = 900;
71         fadt->flush_size = 0;
72         fadt->flush_stride = 0;
73         fadt->duty_offset = 0;
74         fadt->duty_width = 1;   //??
75         fadt->day_alrm = 0x7d;
76         fadt->mon_alrm = 0x7e;
77         fadt->century = 0x32;
78         /* We have legacy devices, 8042, VGA is ok to probe, MSI are not supported */
79         fadt->iapc_boot_arch = 0xb;
80         /* fixme */
81         fadt->flags = 0xa5;
82
83         fadt->reset_reg.space_id = 0;
84         fadt->reset_reg.bit_width = 0;
85         fadt->reset_reg.bit_offset = 0;
86         fadt->reset_reg.resv = 0;
87         fadt->reset_reg.addrl = 0x0;
88         fadt->reset_reg.addrh = 0x0;
89
90         fadt->reset_value = 0;
91         fadt->x_firmware_ctl_l = facs;
92         fadt->x_firmware_ctl_h = 0;
93         fadt->x_dsdt_l = dsdt;
94         fadt->x_dsdt_h = 0;
95
96         fadt->x_pm1a_evt_blk.space_id = 1;
97         fadt->x_pm1a_evt_blk.bit_width = 4;
98         fadt->x_pm1a_evt_blk.bit_offset = 0;
99         fadt->x_pm1a_evt_blk.resv = 0;
100         fadt->x_pm1a_evt_blk.addrl = VT8237R_ACPI_IO_BASE;
101         fadt->x_pm1a_evt_blk.addrh = 0x0;
102
103         fadt->x_pm1b_evt_blk.space_id = 1;
104         fadt->x_pm1b_evt_blk.bit_width = 4;
105         fadt->x_pm1b_evt_blk.bit_offset = 0;
106         fadt->x_pm1b_evt_blk.resv = 0;
107         fadt->x_pm1b_evt_blk.addrl = 0x0;
108         fadt->x_pm1b_evt_blk.addrh = 0x0;
109
110         fadt->x_pm1a_cnt_blk.space_id = 1;
111         fadt->x_pm1a_cnt_blk.bit_width = 2;
112         fadt->x_pm1a_cnt_blk.bit_offset = 0;
113         fadt->x_pm1a_cnt_blk.resv = 0;
114         fadt->x_pm1a_cnt_blk.addrl = VT8237R_ACPI_IO_BASE + 0x4;
115         fadt->x_pm1a_cnt_blk.addrh = 0x0;
116
117         fadt->x_pm1b_cnt_blk.space_id = 1;
118         fadt->x_pm1b_cnt_blk.bit_width = 2;
119         fadt->x_pm1b_cnt_blk.bit_offset = 0;
120         fadt->x_pm1b_cnt_blk.resv = 0;
121         fadt->x_pm1b_cnt_blk.addrl = 0x0;
122         fadt->x_pm1b_cnt_blk.addrh = 0x0;
123
124         fadt->x_pm2_cnt_blk.space_id = 1;
125         fadt->x_pm2_cnt_blk.bit_width = 0;
126         fadt->x_pm2_cnt_blk.bit_offset = 0;
127         fadt->x_pm2_cnt_blk.resv = 0;
128         fadt->x_pm2_cnt_blk.addrl = 0x0;
129         fadt->x_pm2_cnt_blk.addrh = 0x0;
130
131         fadt->x_pm_tmr_blk.space_id = 1;
132         fadt->x_pm_tmr_blk.bit_width = 4;
133         fadt->x_pm_tmr_blk.bit_offset = 0;
134         fadt->x_pm_tmr_blk.resv = 0;
135         fadt->x_pm_tmr_blk.addrl = VT8237R_ACPI_IO_BASE + 0x8;
136         fadt->x_pm_tmr_blk.addrh = 0x0;
137
138         fadt->x_gpe0_blk.space_id = 1;
139         fadt->x_gpe0_blk.bit_width = 0;
140         fadt->x_gpe0_blk.bit_offset = 0;
141         fadt->x_gpe0_blk.resv = 0;
142         fadt->x_gpe0_blk.addrl = VT8237R_ACPI_IO_BASE + 0x20;
143         fadt->x_gpe0_blk.addrh = 0x0;
144
145         fadt->x_gpe1_blk.space_id = 1;
146         fadt->x_gpe1_blk.bit_width = 0;
147         fadt->x_gpe1_blk.bit_offset = 0;
148         fadt->x_gpe1_blk.resv = 0;
149         fadt->x_gpe1_blk.addrl = 0x0;
150         fadt->x_gpe1_blk.addrh = 0x0;
151
152         header->checksum = acpi_checksum((void *) fadt, sizeof(acpi_fadt_t));
153 }