Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git] / src / mainboard / asus / a8v-e_se / Kconfig
1 if BOARD_ASUS_A8V_E_SE
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_939
7         select K8_HT_FREQ_1G_SUPPORT
8         select NORTHBRIDGE_AMD_AMDK8
9         select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
10         select SOUTHBRIDGE_VIA_VT8237R
11         select SOUTHBRIDGE_VIA_K8T890
12         select SUPERIO_WINBOND_W83627EHG
13         select HAVE_OPTION_TABLE
14         select HAVE_ACPI_TABLES
15         select HAVE_MP_TABLE
16         select BOARD_ROMSIZE_KB_512
17         select RAMINIT_SYSINFO
18         select QRANK_DIMM_SUPPORT
19         select SET_FIDVID
20
21 config MAINBOARD_DIR
22         string
23         default asus/a8v-e_se
24
25 config DCACHE_RAM_BASE
26         hex
27         default 0xcc000
28
29 config DCACHE_RAM_SIZE
30         hex
31         default 0x4000
32
33 config DCACHE_RAM_GLOBAL_VAR_SIZE
34         hex
35         default 0x1000
36
37 config APIC_ID_OFFSET
38         hex
39         default 0x10
40
41 config SB_HT_CHAIN_ON_BUS0
42         int
43         default 1
44
45 config MAINBOARD_PART_NUMBER
46         string
47         default "A8V-E SE"
48
49 config HW_MEM_HOLE_SIZEK
50         hex
51         default 0
52
53 config MAX_CPUS
54         int
55         default 2
56
57 config MAX_PHYSICAL_CPUS
58         int
59         default 1
60
61 config HEAP_SIZE
62         hex
63         default 0x40000
64
65 config HT_CHAIN_END_UNITID_BASE
66         hex
67         default 0x20
68
69 config HT_CHAIN_UNITID_BASE
70         hex
71         default 0x0
72
73 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
74         hex
75         default 0x1043
76
77 endif # BOARD_ASUS_A8V_E_SE