2 ## This file is part of the LinuxBIOS project.
4 ## Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de>
5 ## (Thanks to LSRA University of Mannheim for their support)
7 ## This program is free software; you can redistribute it and/or modify
8 ## it under the terms of the GNU General Public License as published by
9 ## the Free Software Foundation; either version 2 of the License, or
10 ## (at your option) any later version.
12 ## This program is distributed in the hope that it will be useful,
13 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
14 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 ## GNU General Public License for more details.
17 ## You should have received a copy of the GNU General Public License
18 ## along with this program; if not, write to the Free Software
19 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 uses USE_FALLBACK_IMAGE
25 uses USE_FAILOVER_IMAGE
26 uses HAVE_FALLBACK_BOOT
27 uses HAVE_FAILOVER_BOOT
30 uses HAVE_OPTION_TABLE
32 uses CONFIG_MAX_PHYSICAL_CPUS
33 uses CONFIG_LOGICAL_CPUS
42 uses ROM_SECTION_OFFSET
43 uses CONFIG_ROM_PAYLOAD
44 uses CONFIG_ROM_PAYLOAD_START
45 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
46 uses CONFIG_PRECOMPRESSED_PAYLOAD
54 uses LB_CKS_RANGE_START
57 uses MAINBOARD_PART_NUMBER
60 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
61 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
62 uses LINUXBIOS_EXTRA_VERSION
72 uses DEFAULT_CONSOLE_LOGLEVEL
73 uses MAXIMUM_CONSOLE_LOGLEVEL
74 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
75 uses CONFIG_CONSOLE_SERIAL8250
76 uses CONFIG_CONSOLE_BTEXT
80 uses CONFIG_CONSOLE_VGA
81 uses CONFIG_PCI_ROM_RUN
82 uses HW_MEM_HOLE_SIZEK
88 uses DCACHE_RAM_GLOBAL_VAR_SIZE
89 uses CONFIG_AP_CODE_IN_CAR
91 uses WAIT_BEFORE_CPUS_INIT
93 uses ENABLE_APIC_EXT_ID
97 uses CONFIG_PCI_64BIT_PREF_MEM
99 uses HT_CHAIN_UNITID_BASE
100 uses HT_CHAIN_END_UNITID_BASE
101 uses SB_HT_CHAIN_ON_BUS0
102 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
104 uses CONFIG_LB_MEM_TOPK
107 ## ROM_SIZE is the size of boot ROM that this board will use.
109 default ROM_SIZE=(512*1024)
112 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
114 default FALLBACK_SIZE=(252*1024)
117 default FAILOVER_SIZE=(4*1024)
124 ## Build code for the fallback boot
126 default HAVE_FALLBACK_BOOT=1
127 default HAVE_FAILOVER_BOOT=1
130 ## Build code to reset the motherboard from linuxBIOS
132 default HAVE_HARD_RESET=1
135 ## Build code to export a programmable irq routing table
137 default HAVE_PIRQ_TABLE=1
138 default IRQ_SLOT_COUNT=13
141 ## Build code to export an x86 MP table
142 ## Useful for specifying IRQ routing values
144 default HAVE_MP_TABLE=1
147 ## Build code to export a CMOS option table
149 default HAVE_OPTION_TABLE=1
152 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
154 default LB_CKS_RANGE_START=49
155 default LB_CKS_RANGE_END=122
156 default LB_CKS_LOC=123
159 ## Build code for SMP support
160 ## Only worry about 2 micro processors
163 default CONFIG_MAX_CPUS=2
164 default CONFIG_MAX_PHYSICAL_CPUS=1
165 default CONFIG_LOGICAL_CPUS=1
168 default HW_MEM_HOLE_SIZEK=0x100000
170 ##HT Unit ID offset, default is 1, the typical one
171 default HT_CHAIN_UNITID_BASE=0
173 ##real SB Unit ID, default is 0x20, mean dont touch it at last
174 #default HT_CHAIN_END_UNITID_BASE=0x10
176 #make the SB HT chain on bus 0, default is not (0)
177 default SB_HT_CHAIN_ON_BUS0=2
179 ##only offset for SB chain?, default is yes(1)
180 default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
183 #default CONFIG_CONSOLE_BTEXT=1
186 default CONFIG_CONSOLE_VGA=1
187 default CONFIG_PCI_ROM_RUN=1
190 ## enable CACHE_AS_RAM specifics
192 default USE_DCACHE_RAM=1
193 #default DCACHE_RAM_BASE=0xcf000
194 #default DCACHE_RAM_SIZE=0x1000
195 default DCACHE_RAM_BASE=0xc8000
196 default DCACHE_RAM_SIZE=0x08000
197 default DCACHE_RAM_GLOBAL_VAR_SIZE=0x01000
198 default CONFIG_USE_INIT=0
200 default CONFIG_AP_CODE_IN_CAR=0
201 default MEM_TRAIN_SEQ=2
202 default WAIT_BEFORE_CPUS_INIT=0
205 #default ENABLE_APIC_EXT_ID=0
206 #default APIC_ID_OFFSET=0x10
207 #default LIFT_BSP_APIC_ID=0
210 #default CONFIG_PCI_64BIT_PREF_MEM=1
213 ## Build code to setup a generic IOAPIC
215 default CONFIG_IOAPIC=1
218 ## Clean up the motherboard id strings
220 default MAINBOARD_PART_NUMBER="A8NE"
221 default MAINBOARD_VENDOR="ASUS"
222 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
223 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2891
226 ### LinuxBIOS layout values
229 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
230 default ROM_IMAGE_SIZE = (64*1024)
234 ## Use a small 8K stack
236 default STACK_SIZE=0x2000
239 ## Use a small 16K heap
241 default HEAP_SIZE=0x4000
244 ## Only use the option table in a normal image
246 #efault USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
247 default USE_OPTION_TABLE = (!USE_FALLBACK_IMAGE) && (!USE_FAILOVER_IMAGE )
250 ## LinuxBIOS C code runs at this location in RAM
252 default _RAMBASE=0x00004000
255 ## Load the payload from the ROM
257 default CONFIG_ROM_PAYLOAD = 1
260 ### Defaults of options that you may want to override in the target config file
264 ## The default compiler
266 default CC="$(CROSS_COMPILE)gcc -m32"
270 ## Disable the gdb stub by default
272 default CONFIG_GDB_STUB=0
275 ## The Serial Console
278 # To Enable the Serial Console
279 default CONFIG_CONSOLE_SERIAL8250=1
281 ## Select the serial console baud rate
282 default TTYS0_BAUD=115200
283 #default TTYS0_BAUD=57600
284 #default TTYS0_BAUD=38400
285 #default TTYS0_BAUD=19200
286 #default TTYS0_BAUD=9600
287 #default TTYS0_BAUD=4800
288 #default TTYS0_BAUD=2400
289 #default TTYS0_BAUD=1200
291 # Select the serial console base port
292 default TTYS0_BASE=0x3f8
294 # Select the serial protocol
295 # This defaults to 8 data bits, 1 stop bit, and no parity
296 default TTYS0_LCS=0x3
299 ### Select the linuxBIOS loglevel
301 ## EMERG 1 system is unusable
302 ## ALERT 2 action must be taken immediately
303 ## CRIT 3 critical conditions
304 ## ERR 4 error conditions
305 ## WARNING 5 warning conditions
306 ## NOTICE 6 normal but significant condition
307 ## INFO 7 informational
308 ## DEBUG 8 debug-level messages
309 ## SPEW 9 Way too many details
311 ## Request this level of debugging output
312 default DEFAULT_CONSOLE_LOGLEVEL=8
313 ## At a maximum only compile in this level of debugging
314 default MAXIMUM_CONSOLE_LOGLEVEL=8
317 ## Select power on after power fail setting
318 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"