src/mainboard/asrock/e350m1/romstage.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2011 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 #include <stdint.h>
  21 #include <string.h>
  22 #include <device/pci_def.h>
  23 #include <device/pci_ids.h>
  24 #include <arch/io.h>
  25 #include <arch/stages.h>
  26 #include <device/pnp_def.h>
  27 #include <arch/romcc_io.h>
  28 #include <arch/cpu.h>
  29 #include <cpu/x86/lapic.h>
  30 #include <console/console.h>
  31 #include <console/loglevel.h>
  32 #include "agesawrapper.h"
  33 #include "cpu/x86/bist.h"
  34 #include "superio/winbond/w83627hf/early_serial.c"
  35 #include "cpu/x86/lapic/boot_cpu.c"
  36 #include "pc80/i8254.c"
  37 #include "pc80/i8259.c"
  38 #include "SbEarly.h"
  39 #include "SBPLATFORM.h"
  40
  41 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
  42
  43 #define SERIAL_DEV PNP_DEV(CONFIG_SIO_PORT, W83627HF_SP1)
  44
  45 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
  46 {
  47         u32 val;
  48         u8 reg8;
  49
  50         // all cores: allow caching of flash chip code and data
  51         // (there are no cache-as-ram reliability concerns with family 14h)
  52         __writemsr(0x20c, (0x0100000000ull - CONFIG_ROM_SIZE) | 5);
  53         __writemsr(0x20d, (0x1000000000ull - CONFIG_ROM_SIZE) | 0x800);
  54
  55         // all cores: set pstate 0 (1600 MHz) early to save a few ms of boot time
  56         __writemsr(0xc0010062, 0);
  57
  58         if (boot_cpu()) {
  59                 u8 reg8;
  60                 // SB800: Program AcpiMmioEn to enable MMIO access to MiscCntrl register
  61                 outb(0x24, 0xCD6);
  62                 reg8 = inb(0xCD7);
  63                 reg8 |= 1;
  64                 reg8 &= ~(1 << 1);
  65                 outb(0x24, 0xCD6);
  66                 outb(reg8, 0xCD7);
  67
  68                 // Program SB800 MiscCntrl
  69                 *(volatile u32 *)(0xFED80000 + 0xE00 + 0x40) &= ~((1 << 0) | (1 << 2)); /* 48Mhz */
  70                 *(volatile u32 *)(0xFED80000 + 0xE00 + 0x40) |= 1 << 1; /* 48Mhz */
  71         }
  72
  73         if (!cpu_init_detectedx && boot_cpu()) {
  74                 post_code(0x30);
  75                 sb_poweron_init();
  76
  77                 post_code(0x31);
  78                 w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
  79                 console_init();
  80         }
  81
  82         /* Halt if there was a built in self test failure */
  83         post_code(0x34);
  84         report_bist_failure(bist);
  85
  86         // Load MPB
  87         val = cpuid_eax(1);
  88         printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
  89         printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
  90
  91         post_code(0x35);
  92         val = agesawrapper_amdinitmmio();
  93
  94         post_code(0x37);
  95         val = agesawrapper_amdinitreset();
  96         if (val) {
  97                 printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n",
  98                        val);
  99         }
 100
 101         post_code(0x38);
 102         printk(BIOS_DEBUG, "Got past sb800_early_setup\n");
 103
 104         post_code(0x39);
 105         val = agesawrapper_amdinitearly();
 106         if (val) {
 107                 printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n",
 108                        val);
 109         }
 110         printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
 111
 112         post_code(0x40);
 113         val = agesawrapper_amdinitpost();
 114         if (val) {
 115                 printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n",
 116                        val);
 117         }
 118         printk(BIOS_DEBUG, "Got past agesawrapper_amdinitpost\n");
 119
 120         post_code(0x41);
 121         val = agesawrapper_amdinitenv();
 122         if (val) {
 123                 printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n",
 124                        val);
 125         }
 126         printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
 127
 128         /* Initialize i8259 pic */
 129         post_code(0x41);
 130         setup_i8259();
 131
 132         /* Initialize i8254 timers */
 133         post_code(0x42);
 134         setup_i8254();
 135
 136         post_code(0x50);
 137         copy_and_run(0);
 138
 139         post_code(0x54);        // Should never see this post code.
 140 }