amd/sb700: Move HAVE_HARD_RESET to southbridge
[coreboot.git] / src / mainboard / asrock / 939a785gmh / Kconfig
1 if BOARD_ASROCK_939A785GMH
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_939
7         select K8_HT_FREQ_1G_SUPPORT
8         select NORTHBRIDGE_AMD_AMDK8
9         select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
10         select SOUTHBRIDGE_AMD_RS780
11         select SOUTHBRIDGE_AMD_SB700
12         select SUPERIO_WINBOND_W83627DHG
13         select HAVE_ACPI_TABLES
14         select HAVE_ACPI_RESUME
15         select HAVE_MP_TABLE
16         select HAVE_PIRQ_TABLE
17         select HAVE_MAINBOARD_RESOURCES
18         select HAVE_OPTION_TABLE
19         select HAVE_BUS_CONFIG
20         select LIFT_BSP_APIC_ID
21         select SB_HT_CHAIN_UNITID_OFFSET_ONLY
22         select BOARD_ROMSIZE_KB_1024
23         select GFXUMA
24         select RAMINIT_SYSINFO
25         select QRANK_DIMM_SUPPORT
26         select SET_FIDVID
27
28 config MAINBOARD_DIR
29         string
30         default asrock/939a785gmh
31
32 config DCACHE_RAM_BASE
33         hex
34         default 0xc8000
35
36 config DCACHE_RAM_SIZE
37         hex
38         default 0x08000
39
40 config DCACHE_RAM_GLOBAL_VAR_SIZE
41         hex
42         default 0x01000
43
44 config APIC_ID_OFFSET
45         hex
46         default 0x0
47
48 config MAINBOARD_PART_NUMBER
49         string
50         default "939A785GMH"
51
52 config MAX_CPUS
53         int
54         default 8
55
56 config MAX_PHYSICAL_CPUS
57         int
58         default 2
59
60 config SB_HT_CHAIN_ON_BUS0
61         int
62         default 1
63
64 config HT_CHAIN_END_UNITID_BASE
65         hex
66         default 0x1
67
68 config HT_CHAIN_UNITID_BASE
69         hex
70         default 0x0
71
72 config IRQ_SLOT_COUNT
73         int
74         default 11
75
76 endif # BOARD_ASROCK_939A785GMH