3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_MAX_PHYSICAL_CPUS
17 uses ROM_SECTION_OFFSET
18 uses CONFIG_ROM_STREAM
19 uses CONFIG_ROM_STREAM_START
27 uses LB_CKS_RANGE_START
31 uses MAINBOARD_PART_NUMBER
33 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
34 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
35 uses LINUXBIOS_EXTRA_VERSION
40 uses DEFAULT_CONSOLE_LOGLEVEL
41 uses MAXIMUM_CONSOLE_LOGLEVEL
42 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
43 uses CONFIG_CONSOLE_SERIAL8250
50 uses CONFIG_CONSOLE_VGA
51 uses CONFIG_PCI_ROM_RUN
60 ## ROM_SIZE is the size of boot ROM that this board will use.
62 default ROM_SIZE=524288
65 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
67 default FALLBACK_SIZE=131072
70 ## Build code for the fallback boot
72 default HAVE_FALLBACK_BOOT=1
75 ## Build code to reset the motherboard from linuxBIOS
77 default HAVE_HARD_RESET=1
80 ## Build code to export a programmable irq routing table
82 default HAVE_PIRQ_TABLE=1
83 default IRQ_SLOT_COUNT=9
86 ## Build code to export an x86 MP table
87 ## Useful for specifying IRQ routing values
89 default HAVE_MP_TABLE=1
92 ## Build code to export a CMOS option table
94 default HAVE_OPTION_TABLE=1
97 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
99 default LB_CKS_RANGE_START=49
100 default LB_CKS_RANGE_END=122
101 default LB_CKS_LOC=123
104 ## Build code for SMP support
105 ## Only worry about 2 micro processors
108 default CONFIG_MAX_CPUS=2
109 default CONFIG_MAX_PHYSICAL_CPUS=2
112 ## Build code to setup a generic IOAPIC
114 default CONFIG_IOAPIC=1
117 default CONFIG_CONSOLE_VGA=1
118 default CONFIG_PCI_ROM_RUN=1
121 ## Clean up the motherboard id strings
123 default MAINBOARD_PART_NUMBER="HDAMA"
124 default MAINBOARD_VENDOR="ARIMA"
125 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x161f
126 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x3016
130 ### LinuxBIOS layout values
133 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
134 default ROM_IMAGE_SIZE = 65536
137 ## Use a small 8K stack
139 default STACK_SIZE=0x2000
142 ## Use a small 16K heap
144 default HEAP_SIZE=0x4000
147 ## Only use the option table in a normal image
149 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
152 ## LinuxBIOS C code runs at this location in RAM
154 default _RAMBASE=0x00004000
157 ## Load the payload from the ROM
159 default CONFIG_ROM_STREAM = 1
162 ### Defaults of options that you may want to override in the target config file
166 ## The default compiler
168 default CC="$(CROSS_COMPILE)gcc -m32"
172 ## Disable the gdb stub by default
174 default CONFIG_GDB_STUB=0
177 ## The Serial Console
180 # To Enable the Serial Console
181 default CONFIG_CONSOLE_SERIAL8250=1
183 ## Select the serial console baud rate
184 default TTYS0_BAUD=115200
185 #default TTYS0_BAUD=57600
186 #default TTYS0_BAUD=38400
187 #default TTYS0_BAUD=19200
188 #default TTYS0_BAUD=9600
189 #default TTYS0_BAUD=4800
190 #default TTYS0_BAUD=2400
191 #default TTYS0_BAUD=1200
193 # Select the serial console base port
194 default TTYS0_BASE=0x3f8
196 # Select the serial protocol
197 # This defaults to 8 data bits, 1 stop bit, and no parity
198 default TTYS0_LCS=0x3
201 ### Select the linuxBIOS loglevel
203 ## EMERG 1 system is unusable
204 ## ALERT 2 action must be taken immediately
205 ## CRIT 3 critical conditions
206 ## ERR 4 error conditions
207 ## WARNING 5 warning conditions
208 ## NOTICE 6 normal but significant condition
209 ## INFO 7 informational
210 ## DEBUG 8 debug-level messages
211 ## SPEW 9 Way too many details
213 ## Request this level of debugging output
214 default DEFAULT_CONSOLE_LOGLEVEL=8
215 ## At a maximum only compile in this level of debugging
216 default MAXIMUM_CONSOLE_LOGLEVEL=8
219 ## Select power on after power fail setting
220 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"