3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
8 uses HARD_RESET_FUNCTION
10 uses HAVE_OPTION_TABLE
12 uses CONFIG_MAX_PHYSICAL_CPUS
20 uses ROM_SECTION_OFFSET
21 uses CONFIG_ROM_STREAM
22 uses CONFIG_ROM_STREAM_START
30 uses LB_CKS_RANGE_START
34 uses MAINBOARD_PART_NUMBER
36 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
37 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
38 uses LINUXBIOS_EXTRA_VERSION
43 uses DEFAULT_CONSOLE_LOGLEVEL
44 uses MAXIMUM_CONSOLE_LOGLEVEL
45 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
46 uses CONFIG_CONSOLE_SERIAL8250
53 uses CONFIG_CONSOLE_VGA
54 uses CONFIG_PCI_ROM_RUN
63 ## ROM_SIZE is the size of boot ROM that this board will use.
65 default ROM_SIZE=524288
68 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
70 default FALLBACK_SIZE=131072
73 ## Build code for the fallback boot
75 default HAVE_FALLBACK_BOOT=1
78 ## Build code to reset the motherboard from linuxBIOS
80 default HAVE_HARD_RESET=1
83 ## Funky hard reset implementation
85 default HARD_RESET_BUS=1
86 default HARD_RESET_DEVICE=4
87 default HARD_RESET_FUNCTION=0
90 ## Build code to export a programmable irq routing table
92 default HAVE_PIRQ_TABLE=1
93 default IRQ_SLOT_COUNT=9
96 ## Build code to export an x86 MP table
97 ## Useful for specifying IRQ routing values
99 default HAVE_MP_TABLE=1
102 ## Build code to export a CMOS option table
104 default HAVE_OPTION_TABLE=1
107 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
109 default LB_CKS_RANGE_START=49
110 default LB_CKS_RANGE_END=122
111 default LB_CKS_LOC=123
114 ## Build code for SMP support
115 ## Only worry about 2 micro processors
118 default CONFIG_MAX_CPUS=2
119 default CONFIG_MAX_PHYSICAL_CPUS=2
122 ## Build code to setup a generic IOAPIC
124 default CONFIG_IOAPIC=1
127 default CONFIG_CONSOLE_VGA=1
128 default CONFIG_PCI_ROM_RUN=1
131 ## Clean up the motherboard id strings
133 default MAINBOARD_PART_NUMBER="HDAMA"
134 default MAINBOARD_VENDOR="ARIMA"
135 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x161f
136 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x3016
140 ### LinuxBIOS layout values
143 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
144 default ROM_IMAGE_SIZE = 65536
147 ## Use a small 8K stack
149 default STACK_SIZE=0x2000
152 ## Use a small 16K heap
154 default HEAP_SIZE=0x4000
157 ## Only use the option table in a normal image
159 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
162 ## LinuxBIOS C code runs at this location in RAM
164 default _RAMBASE=0x00004000
167 ## Load the payload from the ROM
169 default CONFIG_ROM_STREAM = 1
172 ### Defaults of options that you may want to override in the target config file
176 ## The default compiler
178 default CC="$(CROSS_COMPILE)gcc -m32"
182 ## Disable the gdb stub by default
184 default CONFIG_GDB_STUB=0
187 ## The Serial Console
190 # To Enable the Serial Console
191 default CONFIG_CONSOLE_SERIAL8250=1
193 ## Select the serial console baud rate
194 default TTYS0_BAUD=115200
195 #default TTYS0_BAUD=57600
196 #default TTYS0_BAUD=38400
197 #default TTYS0_BAUD=19200
198 #default TTYS0_BAUD=9600
199 #default TTYS0_BAUD=4800
200 #default TTYS0_BAUD=2400
201 #default TTYS0_BAUD=1200
203 # Select the serial console base port
204 default TTYS0_BASE=0x3f8
206 # Select the serial protocol
207 # This defaults to 8 data bits, 1 stop bit, and no parity
208 default TTYS0_LCS=0x3
211 ### Select the linuxBIOS loglevel
213 ## EMERG 1 system is unusable
214 ## ALERT 2 action must be taken immediately
215 ## CRIT 3 critical conditions
216 ## ERR 4 error conditions
217 ## WARNING 5 warning conditions
218 ## NOTICE 6 normal but significant condition
219 ## INFO 7 informational
220 ## DEBUG 8 debug-level messages
221 ## SPEW 9 Way too many details
223 ## Request this level of debugging output
224 default DEFAULT_CONSOLE_LOGLEVEL=8
225 ## At a maximum only compile in this level of debugging
226 default MAXIMUM_CONSOLE_LOGLEVEL=8
229 ## Select power on after power fail setting
230 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"