3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_MAX_PHYSICAL_CPUS
17 uses ROM_SECTION_OFFSET
18 uses CONFIG_ROM_PAYLOAD
19 uses CONFIG_ROM_PAYLOAD_START
20 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
28 uses LB_CKS_RANGE_START
32 uses MAINBOARD_PART_NUMBER
34 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
35 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
36 uses LINUXBIOS_EXTRA_VERSION
41 uses DEFAULT_CONSOLE_LOGLEVEL
42 uses MAXIMUM_CONSOLE_LOGLEVEL
43 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
44 uses CONFIG_CONSOLE_SERIAL8250
51 uses CONFIG_CONSOLE_VGA
52 uses CONFIG_PCI_ROM_RUN
53 uses CONFIG_LOGICAL_CPUS
62 ## CONFIG_LOGICAL_CPUS enables dual core support
64 default CONFIG_LOGICAL_CPUS=1
67 ## ROM_SIZE is the size of boot ROM that this board will use.
69 default ROM_SIZE=524288
72 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
74 default FALLBACK_SIZE=0x40000
77 ## Build code for the fallback boot
79 default HAVE_FALLBACK_BOOT=1
82 ## Build code to reset the motherboard from linuxBIOS
84 default HAVE_HARD_RESET=1
87 ## Build code to export a programmable irq routing table
89 default HAVE_PIRQ_TABLE=1
90 default IRQ_SLOT_COUNT=9
93 ## Build code to export an x86 MP table
94 ## Useful for specifying IRQ routing values
96 default HAVE_MP_TABLE=1
99 ## Build code to export a CMOS option table
101 default HAVE_OPTION_TABLE=1
104 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
106 default LB_CKS_RANGE_START=49
107 default LB_CKS_RANGE_END=122
108 default LB_CKS_LOC=123
111 ## Build code for SMP support
112 ## Only worry about 2 micro processors
115 default CONFIG_MAX_CPUS=4
116 default CONFIG_MAX_PHYSICAL_CPUS=2
119 ## Build code to setup a generic IOAPIC
121 default CONFIG_IOAPIC=1
124 default CONFIG_CONSOLE_VGA=1
125 default CONFIG_PCI_ROM_RUN=1
128 ## Clean up the motherboard id strings
130 default MAINBOARD_PART_NUMBER="HDAMA"
131 default MAINBOARD_VENDOR="ARIMA"
132 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x161f
133 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x3016
137 ### LinuxBIOS layout values
140 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
141 default ROM_IMAGE_SIZE = 65536
144 ## Use a small 8K stack
146 default STACK_SIZE=0x2000
149 ## Use a small 16K heap
151 default HEAP_SIZE=0x4000
154 ## Only use the option table in a normal image
156 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
159 ## LinuxBIOS C code runs at this location in RAM
161 default _RAMBASE=0x00004000
164 ## Load the payload from the ROM
166 default CONFIG_ROM_PAYLOAD = 1
169 ### Defaults of options that you may want to override in the target config file
173 ## The default compiler
175 default CC="$(CROSS_COMPILE)gcc -m32"
179 ## Disable the gdb stub by default
181 default CONFIG_GDB_STUB=0
184 ## The Serial Console
187 # To Enable the Serial Console
188 default CONFIG_CONSOLE_SERIAL8250=1
190 ## Select the serial console baud rate
191 default TTYS0_BAUD=115200
192 #default TTYS0_BAUD=57600
193 #default TTYS0_BAUD=38400
194 #default TTYS0_BAUD=19200
195 #default TTYS0_BAUD=9600
196 #default TTYS0_BAUD=4800
197 #default TTYS0_BAUD=2400
198 #default TTYS0_BAUD=1200
200 # Select the serial console base port
201 default TTYS0_BASE=0x3f8
203 # Select the serial protocol
204 # This defaults to 8 data bits, 1 stop bit, and no parity
205 default TTYS0_LCS=0x3
208 ### Select the linuxBIOS loglevel
210 ## EMERG 1 system is unusable
211 ## ALERT 2 action must be taken immediately
212 ## CRIT 3 critical conditions
213 ## ERR 4 error conditions
214 ## WARNING 5 warning conditions
215 ## NOTICE 6 normal but significant condition
216 ## INFO 7 informational
217 ## DEBUG 8 debug-level messages
218 ## SPEW 9 Way too many details
220 ## Request this level of debugging output
221 default DEFAULT_CONSOLE_LOGLEVEL=8
222 ## At a maximum only compile in this level of debugging
223 default MAXIMUM_CONSOLE_LOGLEVEL=8
226 ## Select power on after power fail setting
227 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"