1 /*****************************************************************************
3 * Copyright (c) 2011, Advanced Micro Devices, Inc.
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7 * modification, are permitted provided that the following conditions are met:
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28 ***************************************************************************/
30 /*----------------------------------------------------------------------------------------
31 * M O D U L E S U S E D
32 *----------------------------------------------------------------------------------------
40 /*----------------------------------------------------------------------------------------
41 * D E F I N I T I O N S A N D M A C R O S
42 *----------------------------------------------------------------------------------------
44 #define SMBUS_BASE_ADDR 0xB00
45 #define DIMENSION(array)(sizeof (array)/ sizeof (array [0]))
47 /*----------------------------------------------------------------------------------------
48 * T Y P E D E F S A N D S T R U C T U R E S
49 *----------------------------------------------------------------------------------------
52 typedef struct _DIMM_INFO_SMBUS{
59 * SPD address table - porting required
61 STATIC CONST DIMM_INFO_SMBUS SpdAddrLookup [] =
63 /* Socket, Channel, Dimm, Smbus */
68 /*----------------------------------------------------------------------------------------
69 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
70 *----------------------------------------------------------------------------------------
73 /*----------------------------------------------------------------------------------------
74 * E X P O R T E D F U N C T I O N S
75 *----------------------------------------------------------------------------------------
78 /*---------------------------------------------------------------------------------------
79 * L O C A L F U N C T I O N S
80 *---------------------------------------------------------------------------------------
90 __outbyte (0xCD6, Reg);
91 __outbyte (0xCD7, Data);
100 WritePmReg (0x2D, IoBase >> 8);
101 WritePmReg (0x2C, IoBase | 1);
102 WritePmReg (0x29, 0x80);
103 WritePmReg (0x28, 0x61);
104 /* set SMBus clock to 400 KHz */
105 __outbyte (IoBase + 0x0E, 66000000 / 400000 / 4);
110 * ReadSmbusByteData - read a single SPD byte from any offset
126 Address |= 1; // set read bit
128 __outbyte (Iobase + 0, 0xFF); // clear error status
129 __outbyte (Iobase + 1, 0x1F); // clear error status
130 __outbyte (Iobase + 3, Offset); // offset in eeprom
131 __outbyte (Iobase + 4, Address); // slave address and read bit
132 __outbyte (Iobase + 2, 0x48); // read byte command
134 /* time limit to avoid hanging for unexpected error status (should never happen) */
135 Limit = __rdtsc () + 2000000000 / 10;
137 Status = __inbyte (Iobase);
138 if (__rdtsc () > Limit) break;
139 if ((Status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
140 if ((Status & 1) == 1) continue; // HostBusy set, keep waiting
144 Buffer [0] = __inbyte (Iobase + 5);
145 if (Status == 2) Status = 0; // check for done with no errors
151 * ReadSmbusByte - read a single SPD byte from the default offset
152 * this function is faster function readSmbusByteData
167 __outbyte (Iobase + 0, 0xFF); // clear error status
168 __outbyte (Iobase + 2, 0x44); // read command
170 // time limit to avoid hanging for unexpected error status
171 Limit = __rdtsc () + 2000000000 / 10;
173 Status = __inbyte (Iobase);
174 if (__rdtsc () > Limit) break;
175 if ((Status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
176 if ((Status & 1) == 1) continue; // HostBusy set, keep waiting
180 Buffer [0] = __inbyte (Iobase + 5);
181 if (Status == 2) Status = 0; // check for done with no errors
187 * ReadSpd - Read one or more SPD bytes from a DIMM.
188 * Start with offset zero and read sequentially.
189 * Optimization relies on autoincrement to avoid
190 * sending offset for every byte.
191 * Reads 128 bytes in 7-8 ms at 400 KHz.
199 IN UINT8 SmbusSlaveAddress,
206 /* read the first byte using offset zero */
207 Status = ReadSmbusByteData (IoBase, SmbusSlaveAddress, Buffer, 0);
208 if (Status) return Status;
210 /* read the remaining bytes using auto-increment for speed */
211 for (Index = 1; Index < Count; Index++){
212 Status = ReadSmbusByte (IoBase, SmbusSlaveAddress, &Buffer [Index]);
213 if (Status) return Status;
222 IN OUT AGESA_READ_SPD_PARAMS *SpdData
225 UINT8 SmBusAddress = 0;
227 UINTN MaxSocket = DIMENSION (SpdAddrLookup);
228 for (Index = 0; Index < MaxSocket; Index ++){
229 if ((SpdData->SocketId == SpdAddrLookup[Index].SocketId) &&
230 (SpdData->MemChannelId == SpdAddrLookup[Index].MemChannelId) &&
231 (SpdData->DimmId == SpdAddrLookup[Index].DimmId)) {
232 SmBusAddress = SpdAddrLookup[Index].SmbusAddress;
238 if (SmBusAddress == 0) return AGESA_ERROR;
239 SetupFch (SMBUS_BASE_ADDR);
240 return ReadSpd (SMBUS_BASE_ADDR, SmBusAddress, SpdData->Buffer, 128);