2 * This file is part of the coreboot project.
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 /*----------------------------------------------------------------------------------------
21 * M O D U L E S U S E D
22 *----------------------------------------------------------------------------------------
26 #ifndef _AGESAWRAPPER_H_
27 #define _AGESAWRAPPER_H_
33 /*----------------------------------------------------------------------------------------
34 * D E F I N I T I O N S A N D M A C R O S
35 *----------------------------------------------------------------------------------------
37 /* Define AMD Ontario APPU SSID/SVID */
38 #define AMD_APU_SVID 0x1022
39 #define AMD_APU_SSID 0x1234
40 #define PCIE_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
42 /* Hudson-2 ACPI PmIO Space Define */
43 #define SB_ACPI_BASE_ADDRESS 0x0400
44 #define ACPI_MMIO_BASE 0xFED80000
45 #define SB_CFG_BASE 0x000 // DWORD
46 #define GPIO_BASE 0x100 // BYTE
47 #define SMI_BASE 0x200 // DWORD
48 #define PMIO_BASE 0x300 // DWORD
49 #define PMIO2_BASE 0x400 // BYTE
50 #define BIOS_RAM_BASE 0x500 // BYTE
51 #define CMOS_RAM_BASE 0x600 // BYTE
52 #define CMOS_BASE 0x700 // BYTE
53 #define ASF_BASE 0x900 // DWORD
54 #define SMBUS_BASE 0xA00 // DWORD
55 #define WATCHDOG_BASE 0xB00 // ??
56 #define HPET_BASE 0xC00 // DWORD
57 #define IOMUX_BASE 0xD00 // BYTE
58 #define MISC_BASE 0xE00
59 #define SERIAL_DEBUG_BASE 0x1000
60 #define GFX_DAC_BASE 0x1400
61 #define CEC_BASE 0x1800
62 #define XHCI_BASE 0x1C00
63 #define ACPI_SMI_DATA_PORT 0xB1
64 #define R_SB_ACPI_PM1_STATUS 0x00
65 #define R_SB_ACPI_PM1_ENABLE 0x02
66 #define R_SB_ACPI_PM_CONTROL 0x04
67 #define R_SB_ACPI_EVENT_STATUS 0x20
68 #define R_SB_ACPI_EVENT_ENABLE 0x24
69 #define B_PWR_BTN_STATUS BIT8
70 #define B_WAKEUP_STATUS BIT15
72 #define SB_PM_INDEX_PORT 0xCD6
73 #define SB_PM_DATA_PORT 0xCD7
74 #define SB_PMIOA_REG24 0x24 // AcpiMmioEn
75 #define MmioAddress( BaseAddr, Register ) \
79 #define Mmio32Ptr( BaseAddr, Register ) \
80 ( (volatile UINT32 *)MmioAddress( BaseAddr, Register ) )
81 #define Mmio32( BaseAddr, Register ) \
82 *Mmio32Ptr( BaseAddr, Register )
85 PICK_DMI, /* DMI Interface */
86 PICK_PSTATE, /* Acpi Pstate SSDT Table */
87 PICK_SRAT, /* SRAT Table */
88 PICK_SLIT, /* SLIT Table */
89 PICK_WHEA_MCE, /* WHEA MCE table */
90 PICK_WHEA_CMC, /* WHEA CMV table */
91 PICK_ALIB, /* SACPI SSDT table with ALIB implementation */
96 /*----------------------------------------------------------------------------------------
97 * T Y P E D E F S A N D S T R U C T U R E S
98 *----------------------------------------------------------------------------------------
103 AGESA_STATUS (*CalloutPtr) (UINT32 Func, UINT32 Data, VOID* ConfigPtr);
104 } BIOS_CALLOUT_STRUCT;
106 /*----------------------------------------------------------------------------------------
107 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
108 *----------------------------------------------------------------------------------------
111 /*----------------------------------------------------------------------------------------
112 * E X P O R T E D F U N C T I O N S
113 *----------------------------------------------------------------------------------------
116 /*---------------------------------------------------------------------------------------
117 * L O C A L F U N C T I O N S
118 *---------------------------------------------------------------------------------------
121 UINT32 agesawrapper_amdinitreset (void);
122 UINT32 agesawrapper_amdinitearly (void);
123 UINT32 agesawrapper_amdinitenv (void);
124 UINT32 agesawrapper_amdinitlate (void);
125 UINT32 agesawrapper_amdinitpost (void);
126 UINT32 agesawrapper_amdinitmid (void);
128 UINT32 agesawrapper_amdreadeventlog (void);
129 UINT32 agesawrapper_amdinitcpuio (void);
130 UINT32 agesawrapper_amdinitmmio (void);
131 UINT32 agesawrapper_amdlaterunaptask (UINT32 Data, VOID *ConfigPtr);
132 void *agesawrapper_getlateinitptr (int pick);