2 * This file is part of the coreboot project.
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
21 #include <device/device.h>
22 #include <device/pci.h>
24 #include <boot/tables.h>
25 #include <cpu/x86/msr.h>
26 #include <cpu/amd/mtrr.h>
27 #include <device/pci_def.h>
28 #include "SBPLATFORM.h" /* Platfrom Specific Definitions */
31 uint64_t uma_memory_base, uma_memory_size;
33 void set_pcie_reset(void);
34 void set_pcie_dereset(void);
40 void set_pcie_reset(void)
46 * mainboard specific SB CIMx callback
48 void set_pcie_dereset(void)
53 * Southstation using SB GPIO 17/18 to control the Red/Green LED
54 * These two LEDs can be used to show the OS booting status.
56 static void southstation_led_init(void)
58 #define GPIO_FUNCTION 2 //GPIO function
59 #define SB_GPIO_REG17 17 //Red Light
60 #define SB_GPIO_REG18 18 //Green Light
62 /* multi-function pins switch to GPIO0-35 */
63 RWMEM(ACPI_MMIO_BASE + PMIO_BASE + SB_PMIOA_REGEA, AccWidthUint8, ~BIT0, 1);
65 /* select IOMux to function2, corresponds to GPIO */
66 RWMEM(ACPI_MMIO_BASE + IOMUX_BASE + SB_GPIO_REG17, AccWidthUint8, ~(BIT0 | BIT1), GPIO_FUNCTION);
67 RWMEM(ACPI_MMIO_BASE + IOMUX_BASE + SB_GPIO_REG18, AccWidthUint8, ~(BIT0 | BIT1), GPIO_FUNCTION);
70 RWMEM(ACPI_MMIO_BASE + GPIO_BASE + SB_GPIO_REG17, AccWidthUint8, ~(0xFF), 0x08); //output high
71 RWMEM(ACPI_MMIO_BASE + GPIO_BASE + SB_GPIO_REG18, AccWidthUint8, ~(0xFF), 0x08);
73 RWMEM(ACPI_MMIO_BASE + GPIO_BASE + SB_GPIO_REG17, AccWidthUint8, ~(0xFF), 0x48); //output low
74 RWMEM(ACPI_MMIO_BASE + GPIO_BASE + SB_GPIO_REG18, AccWidthUint8, ~(0xFF), 0x48);
78 /*************************************************
79 * enable the dedicated function in southstation board.
80 *************************************************/
81 static void southstation_enable(device_t dev)
83 printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
85 #if (CONFIG_GFXUMA == 1)
89 /* TOP_MEM: the top of DRAM below 4G */
92 (BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
93 __func__, msr.lo, msr.hi);
95 /* TOP_MEM2: the top of DRAM above 4G */
96 msr2 = rdmsr(TOP_MEM2);
98 (BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
99 __func__, msr2.lo, msr2.hi);
101 /* refer to UMA Size Consideration in Family14h BKDG. */
102 sys_mem = msr.lo + 0x1000000; // Ignore 16MB allocated for C6 when finding UMA size, refer MemNGetUmaSizeON()
103 if ((msr.hi & 0x0000000F) || (sys_mem >= 0x80000000)) {
104 uma_memory_size = 0x18000000; /* >= 2G memory, 384M recommended UMA */
107 if (sys_mem >= 0x40000000) {
108 uma_memory_size = 0x10000000; /* >= 1G memory, 256M recommended UMA */
111 uma_memory_size = 0x4000000; /* <1G memory, 64M recommended UMA */
115 uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
116 printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
117 __func__, uma_memory_size, uma_memory_base);
121 uma_memory_size = 0x10000000; /* 256M recommended UMA */
122 uma_memory_base = 0x30000000; /* 1GB system memory supported */
124 southstation_led_init();
127 int add_mainboard_resources(struct lb_memory *mem)
129 /* UMA is removed from system memory in the northbridge code, but
130 * in some circumstances we want the memory mentioned as reserved.
132 #if (CONFIG_GFXUMA == 1)
133 printk(BIOS_INFO, "uma_memory_start=0x%llx, uma_memory_size=0x%llx \n",
134 uma_memory_base, uma_memory_size);
135 lb_add_memory_range(mem, LB_MEM_RESERVED, uma_memory_base,
140 struct chip_operations mainboard_ops = {
141 CHIP_NAME(CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_NUMBER " Mainboard")
142 .enable_dev = southstation_enable,