src/mainboard/amd/serengeti_leopard/Config.lb

   1 ##
   2 ## Compute the location and size of where this firmware image
   3 ## (linuxBIOS plus bootloader) will live in the boot rom chip.
   4 ##
   5 if USE_FAILOVER_IMAGE
   6         default ROM_SECTION_SIZE   = FAILOVER_SIZE
   7         default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
   8 else
   9     if USE_FALLBACK_IMAGE
  10         default ROM_SECTION_SIZE   = FALLBACK_SIZE
  11         default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
  12     else
  13         default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
  14         default ROM_SECTION_OFFSET = 0
  15     end
  16 end
  17
  18 ##
  19 ## Compute the start location and size size of
  20 ## The linuxBIOS bootloader.
  21 ##
  22 default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
  23 default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
  24
  25 ##
  26 ## Compute where this copy of linuxBIOS will start in the boot rom
  27 ##
  28 default _ROMBASE      = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
  29
  30 ##
  31 ## Compute a range of ROM that can cached to speed up linuxBIOS,
  32 ## execution speed.
  33 ##
  34 ## XIP_ROM_SIZE must be a power of 2.
  35 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
  36 ##
  37 default XIP_ROM_SIZE=65536
  38
  39 if USE_FAILOVER_IMAGE
  40         default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
  41 else
  42     if USE_FALLBACK_IMAGE
  43         default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
  44     else
  45         default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
  46     end
  47 end
  48
  49 arch i386 end
  50
  51 ##
  52 ## Build the objects we have code for in this directory.
  53 ##
  54
  55 driver mainboard.o
  56
  57 #dir /drivers/si/3114
  58
  59 #needed by irq_tables and mptable and acpi_tables
  60 object get_bus_conf.o
  61
  62 if HAVE_MP_TABLE
  63         object mptable.o
  64 end
  65
  66 if HAVE_PIRQ_TABLE
  67         object irq_tables.o
  68 end
  69
  70 #if HAVE_ACPI_TABLES
  71 #       object acpi_tables.o
  72 #       object fadt.o
  73 #       if SB_HT_CHAIN_ON_BUS0
  74 #               object dsdt_bus0.o
  75 #       else
  76 #               object dsdt.o
  77 #       end
  78 #       object ssdt.o
  79 #       if ACPI_SSDTX_NUM
  80 #                if SB_HT_CHAIN_ON_BUS0
  81 #                 object ssdt2_bus0.o
  82 #                else
  83 #                 object ssdt2.o
  84 #                end
  85 #       end
  86 #end
  87
  88 if HAVE_ACPI_TABLES
  89         object acpi_tables.o
  90         object fadt.o
  91         makerule dsdt.c
  92                 depends "$(MAINBOARD)/dx/dsdt_lb.dsl"
  93                 action  "iasl -tc $(MAINBOARD)/dx/dsdt_lb.dsl"
  94                 action  "mv dsdt_lb.hex dsdt.c"
  95         end
  96         object ./dsdt.o
  97
  98         #./ssdt.o is moved to northbridge/amd/amdk8/Config.lb
  99
 100         if ACPI_SSDTX_NUM
 101             makerule ssdt2.c
 102                         depends "$(MAINBOARD)/dx/pci2.asl"
 103                         action  "iasl -tc $(MAINBOARD)/dx/pci2.asl"
 104                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex"
 105                         action  "mv pci2.hex ssdt2.c"
 106             end
 107             object ./ssdt2.o
 108         end
 109 end
 110
 111 if USE_DCACHE_RAM
 112
 113         if CONFIG_USE_INIT
 114                 # compile cache_as_ram.c to auto.o
 115                 makerule ./cache_as_ram_auto.o
 116                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
 117                         action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@"
 118                 end
 119
 120         else
 121                 #compile cache_as_ram.c to auto.inc
 122                 makerule ./cache_as_ram_auto.inc
 123                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
 124                         action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@"
 125                         action "perl -e 's/.rodata/.rom.data/g' -pi $@"
 126                         action "perl -e 's/.text/.section .rom.text/g' -pi $@"
 127                 end
 128
 129         end
 130 else
 131
 132         ##
 133         ## Romcc output
 134         ##
 135         makerule ./failover.E
 136                 depends "$(MAINBOARD)/failover.c ./romcc"
 137                 action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
 138         end
 139
 140         makerule ./failover.inc
 141                 depends "$(MAINBOARD)/failover.c ./romcc"
 142                 action "./romcc    -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
 143         end
 144
 145         makerule ./auto.E
 146                 depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
 147                 action  "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
 148         end
 149         makerule ./auto.inc
 150                 depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
 151                 action  "./romcc    -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
 152         end
 153
 154 end
 155 ##
 156 ## Build our 16 bit and 32 bit linuxBIOS entry code
 157 ##
 158 if HAVE_FAILOVER_BOOT
 159     if USE_FAILOVER_IMAGE
 160         mainboardinit cpu/x86/16bit/entry16.inc
 161         ldscript /cpu/x86/16bit/entry16.lds
 162     end
 163 else
 164     if USE_FALLBACK_IMAGE
 165         mainboardinit cpu/x86/16bit/entry16.inc
 166         ldscript /cpu/x86/16bit/entry16.lds
 167     end
 168 end
 169
 170 mainboardinit cpu/x86/32bit/entry32.inc
 171 if USE_DCACHE_RAM
 172         if CONFIG_USE_INIT
 173                 ldscript /cpu/x86/32bit/entry32.lds
 174         end
 175
 176         if CONFIG_USE_INIT
 177                 ldscript /cpu/amd/car/cache_as_ram.lds
 178         end
 179 end
 180
 181 ##
 182 ## Build our reset vector (This is where linuxBIOS is entered)
 183 ##
 184 if HAVE_FAILOVER_BOOT
 185     if USE_FAILOVER_IMAGE
 186         mainboardinit cpu/x86/16bit/reset16.inc
 187         ldscript /cpu/x86/16bit/reset16.lds
 188     else
 189         mainboardinit cpu/x86/32bit/reset32.inc
 190         ldscript /cpu/x86/32bit/reset32.lds
 191     end
 192 else
 193     if USE_FALLBACK_IMAGE
 194         mainboardinit cpu/x86/16bit/reset16.inc
 195         ldscript /cpu/x86/16bit/reset16.lds
 196     else
 197         mainboardinit cpu/x86/32bit/reset32.inc
 198         ldscript /cpu/x86/32bit/reset32.lds
 199     end
 200 end
 201
 202 if USE_DCACHE_RAM
 203 else
 204         ### Should this be in the northbridge code?
 205         mainboardinit arch/i386/lib/cpu_reset.inc
 206 end
 207
 208 ##
 209 ## Include an id string (For safe flashing)
 210 ##
 211 mainboardinit arch/i386/lib/id.inc
 212 ldscript /arch/i386/lib/id.lds
 213
 214 if USE_DCACHE_RAM
 215         ##
 216         ## Setup Cache-As-Ram
 217         ##
 218         mainboardinit cpu/amd/car/cache_as_ram.inc
 219 end
 220
 221 ###
 222 ### This is the early phase of linuxBIOS startup
 223 ### Things are delicate and we test to see if we should
 224 ### failover to another image.
 225 ###
 226 if HAVE_FAILOVER_BOOT
 227     if USE_FAILOVER_IMAGE
 228         if USE_DCACHE_RAM
 229                 ldscript /arch/i386/lib/failover_failover.lds
 230         end
 231     end
 232 else
 233     if USE_FALLBACK_IMAGE
 234         if USE_DCACHE_RAM
 235                 ldscript /arch/i386/lib/failover.lds
 236         else
 237                 ldscript /arch/i386/lib/failover.lds
 238                 mainboardinit ./failover.inc
 239         end
 240     end
 241 end
 242
 243 ###
 244 ### O.k. We aren't just an intermediary anymore!
 245 ###
 246
 247 ##
 248 ## Setup RAM
 249 ##
 250 if USE_DCACHE_RAM
 251
 252         if CONFIG_USE_INIT
 253                 initobject cache_as_ram_auto.o
 254         else
 255                 mainboardinit ./cache_as_ram_auto.inc
 256         end
 257
 258 else
 259
 260         ##
 261         ## Setup RAM
 262         ##
 263         mainboardinit cpu/x86/fpu/enable_fpu.inc
 264         mainboardinit cpu/x86/mmx/enable_mmx.inc
 265         mainboardinit cpu/x86/sse/enable_sse.inc
 266         mainboardinit ./auto.inc
 267         mainboardinit cpu/x86/sse/disable_sse.inc
 268         mainboardinit cpu/x86/mmx/disable_mmx.inc
 269
 270 end
 271
 272 ##
 273 ## Include the secondary Configuration files
 274 ##
 275 if CONFIG_CHIP_NAME
 276         config chip.h
 277 end
 278
 279 # sample config for amd/serengeti_cheetah
 280 chip northbridge/amd/amdk8/root_complex
 281         device apic_cluster 0 on
 282                 chip cpu/amd/socket_940
 283                         device apic 0 on end
 284                 end
 285         end
 286         device pci_domain 0 on
 287                 chip northbridge/amd/amdk8
 288                         device pci 18.0 on #  northbridge
 289                                 #  devices on link 0, link 0 == LDT 0
 290                                 chip southbridge/amd/amd8132
 291                                         # the on/off keyword is mandatory
 292                                         device pci 0.0 on end
 293                                         device pci 0.1 on end
 294                                         device pci 1.0 on end
 295                                         device pci 1.1 on end
 296                                 end
 297                                 chip southbridge/amd/amd8111
 298                                         # this "device pci 0.0" is the parent the next one
 299                                         # PCI bridge
 300                                         device pci 0.0 on
 301                                                 device pci 0.0 on end
 302                                                 device pci 0.1 on end
 303                                                 device pci 0.2 off end
 304                                                 device pci 1.0 off end
 305                                         end
 306                                         device pci 1.0 on
 307                                                 chip superio/winbond/w83627hf
 308                                                         device pnp 2e.0 off #  Floppy
 309                                                                 io 0x60 = 0x3f0
 310                                                                 irq 0x70 = 6
 311                                                                 drq 0x74 = 2
 312                                                         end
 313                                                         device pnp 2e.1 off #  Parallel Port
 314                                                                 io 0x60 = 0x378
 315                                                                 irq 0x70 = 7
 316                                                         end
 317                                                         device pnp 2e.2 on #  Com1
 318                                                                 io 0x60 = 0x3f8
 319                                                                 irq 0x70 = 4
 320                                                         end
 321                                                         device pnp 2e.3 off #  Com2
 322                                                                 io 0x60 = 0x2f8
 323                                                                 irq 0x70 = 3
 324                                                         end
 325                                                         device pnp 2e.5 on #  Keyboard
 326                                                                 io 0x60 = 0x60
 327                                                                 io 0x62 = 0x64
 328                                                                 irq 0x70 = 1
 329                                                                 irq 0x72 = 12
 330                                                         end
 331                                                         device pnp 2e.6 off #  CIR
 332                                                                 io 0x60 = 0x100
 333                                                         end
 334                                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
 335                                                                 io 0x60 = 0x220
 336                                                                 io 0x62 = 0x300
 337                                                                 irq 0x70 = 9
 338                                                         end
 339                                                         device pnp 2e.8 off end #  GPIO2
 340                                                         device pnp 2e.9 off end #  GPIO3
 341                                                         device pnp 2e.a off end #  ACPI
 342                                                         device pnp 2e.b on #  HW Monitor
 343                                                                 io 0x60 = 0x290
 344                                                                 irq 0x70 = 5
 345                                                         end
 346                                                 end
 347                                         end
 348                                         device pci 1.1 on end
 349                                         device pci 1.2 on end
 350                                         device pci 1.3 on
 351                                                 chip drivers/i2c/i2cmux # pca9556 smbus mux
 352                                                         device i2c 18 on #0 pca9516 1
 353                                                                 chip drivers/generic/generic #dimm 0-0-0
 354                                                                         device i2c 50 on end
 355                                                                 end
 356                                                                 chip drivers/generic/generic #dimm 0-0-1
 357                                                                         device i2c 51 on end
 358                                                                 end
 359                                                                 chip drivers/generic/generic #dimm 0-1-0
 360                                                                         device i2c 52 on end
 361                                                                 end
 362                                                                 chip drivers/generic/generic #dimm 0-1-1
 363                                                                         device i2c 53 on end
 364                                                                 end
 365                                                         end
 366                                                         device i2c 18 on #1 pca9516 2
 367                                                                 chip drivers/generic/generic #dimm 1-0-0
 368                                                                         device i2c 50 on end
 369                                                                 end
 370                                                                 chip drivers/generic/generic #dimm 1-0-1
 371                                                                         device i2c 51 on end
 372                                                                 end
 373                                                                 chip drivers/generic/generic #dimm 1-1-0
 374                                                                         device i2c 52 on end
 375                                                                 end
 376                                                                 chip drivers/generic/generic #dimm 1-1-1
 377                                                                         device i2c 53 on end
 378                                                                 end
 379                                                         end
 380                                                 end
 381                                         end # acpi
 382                                         device pci 1.5 off end
 383                                         device pci 1.6 off end
 384                                         register "ide0_enable" = "1"
 385                                         register "ide1_enable" = "1"
 386                                 end
 387                         end #  device pci 18.0
 388
 389                         device pci 18.0 on end
 390                         device pci 18.0 on end
 391                         device pci 18.1 on end
 392                         device pci 18.2 on end
 393                         device pci 18.3 on end
 394                 end
 395                 chip northbridge/amd/amdk8
 396                         device pci 19.0 on #  northbridge
 397                                 chip southbridge/amd/amd8151
 398                                         # the on/off keyword is mandatory
 399                                         device pci 0.0 on end
 400                                         device pci 1.0 on end
 401                                 end
 402                         end #  device pci 19.0
 403
 404                         device pci 19.0 on end
 405                         device pci 19.0 on end
 406                         device pci 19.1 on end
 407                         device pci 19.2 on end
 408                         device pci 19.3 on end
 409                 end
 410
 411
 412         end #pci_domain
 413 #        chip drivers/generic/debug
 414 #               device pnp 0.0 off end # chip name
 415 #                device pnp 0.1 on end # pci_regs_all
 416 #                device pnp 0.2 off end # mem
 417 #                device pnp 0.3 off end # cpuid
 418 #                device pnp 0.4 off end # smbus_regs_all
 419 #                device pnp 0.5 off end # dual core msr
 420 #                device pnp 0.6 off end # cache size
 421 #                device pnp 0.7 off end # tsc
 422 #       end
 423
 424 end
 425
 426