2 * This file is part of the LinuxBIOS project.
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 * This file defines the SPD addresses for the mainboard. Must be included in
102 static const u8 spd_addr[] = {
104 RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
105 #if CONFIG_MAX_PHYSICAL_CPUS > 1
107 RC01, DIMM0, DIMM2, DIMM4, DIMM6, DIMM1, DIMM3, DIMM5, DIMM7,
109 #if CONFIG_MAX_PHYSICAL_CPUS > 2
111 RC02, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
113 RC03, DIMM0, DIMM2, DIMM4, DIMM6, DIMM1, DIMM3, DIMM5, DIMM7,
115 #if CONFIG_MAX_PHYSICAL_CPUS > 4
116 RC04, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
117 RC05, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
119 #if CONFIG_MAX_PHYSICAL_CPUS > 6
120 RC06, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
121 RC07, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
123 #if CONFIG_MAX_PHYSICAL_CPUS > 8
124 RC08, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
125 RC09, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
126 RC10, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
127 RC11, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
129 #if CONFIG_MAX_PHYSICAL_CPUS > 12
130 RC12, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
131 RC13, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
132 RC14, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
133 RC15, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
135 #if CONFIG_MAX_PHYSICAL_CPUS > 16
136 RC16, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
137 RC17, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
138 RC18, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
139 RC19, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
141 #if CONFIG_MAX_PHYSICAL_CPUS > 20
142 RC20, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
143 RC21, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
144 RC22, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
145 RC23, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
147 #if CONFIG_MAX_PHYSICAL_CPUS > 24
148 RC24, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
149 RC25, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
150 RC26, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
151 RC27, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
152 RC28, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
153 RC29, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
154 RC30, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
155 RC31, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
157 #if CONFIG_MAX_PHYSICAL_CPUS > 32
158 RC32, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
159 RC33, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
160 RC34, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
161 RC35, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
162 RC36, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
163 RC37, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
164 RC38, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
165 RC39, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
166 RC40, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
167 RC41, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
168 RC42, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
169 RC43, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
170 RC44, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
171 RC45, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
172 RC46, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
173 RC47, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
175 #if CONFIG_MAX_PHYSICAL_CPUS > 48
176 RC48, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
177 RC49, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
178 RC50, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
179 RC51, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
180 RC52, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
181 RC53, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
182 RC54, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
183 RC55, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
184 RC56, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
185 RC57, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
186 RC58, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
187 RC59, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
188 RC60, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
189 RC61, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
190 RC62, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,
191 RC63, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0,