2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <console/console.h>
22 #include <device/pci.h>
25 #include <arch/pirq_routing.h>
26 #include <cpu/amd/amdfam10_sysconf.h>
28 #include "mb_sysconf.h"
30 static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, u8 link0, u16 bitmap0,
31 u8 link1, u16 bitmap1, u8 link2, u16 bitmap2,u8 link3, u16 bitmap3,
35 pirq_info->devfn = devfn;
36 pirq_info->irq[0].link = link0;
37 pirq_info->irq[0].bitmap = bitmap0;
38 pirq_info->irq[1].link = link1;
39 pirq_info->irq[1].bitmap = bitmap1;
40 pirq_info->irq[2].link = link2;
41 pirq_info->irq[2].bitmap = bitmap2;
42 pirq_info->irq[3].link = link3;
43 pirq_info->irq[3].bitmap = bitmap3;
44 pirq_info->slot = slot;
49 extern void get_bus_conf(void);
51 unsigned long write_pirq_routing_table(unsigned long addr)
54 struct irq_routing_table *pirq;
55 struct irq_info *pirq_info;
62 struct mb_sysconf_t *m;
64 get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
68 /* Align the table to be 16 byte aligned. */
72 /* This table must be betweeen 0xf0000 & 0x100000 */
73 printk_info("Writing IRQ routing tables to 0x%x...", addr);
75 pirq = (void *)(addr);
78 pirq->signature = PIRQ_SIGNATURE;
79 pirq->version = PIRQ_VERSION;
81 pirq->rtr_bus = m->bus_8111_0;
82 pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
84 pirq->exclusive_irqs = 0;
86 pirq->rtr_vendor = 0x1022;
87 pirq->rtr_device = 0x746b;
89 pirq->miniport_data = 0;
91 memset(pirq->rfu, 0, sizeof(pirq->rfu));
93 pirq_info = (void *) ( &pirq->checksum + 1);
98 write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn+1)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
99 pirq_info++; slot_num++;
103 // write_pirq_info(pirq_info, m->bus_8132_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
104 // pirq_info++; slot_num++;
108 for(i=1; i< sysconf.hc_possible_num; i++) {
109 if(!(sysconf.pci1234[i] & 0x1) ) continue;
110 u32 busn = (sysconf.pci1234[i] >> 12) & 0xff;
111 u32 devn = sysconf.hcdn[i] & 0xff;
113 write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
114 pirq_info++; slot_num++;
120 write_pirq_info(pirq_info, CONFIG_CBB, (0<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
121 pirq_info++; slot_num++;
122 if(sysconf.nodes>32) {
123 write_pirq_info(pirq_info, CONFIG_CBB-1, (0<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
124 pirq_info++; slot_num++;
128 pirq->size = 32 + 16 * slot_num;
130 for (i = 0; i < pirq->size; i++) {
134 sum = pirq->checksum - sum;
136 if (sum != pirq->checksum) {
137 pirq->checksum = sum;
140 printk_info("done.\n");
142 return (unsigned long) pirq_info;