src/mainboard/amd/serengeti_cheetah_fam10/fadt.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2005 Stefan Reinauer <stepan@openbios.org>
   5  * Copyright (C) 2007 Advanced Micro Devices, Inc.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19  */
  20
  21
  22 /*
  23  * ACPI - create the Fixed ACPI Description Tables (FADT)
  24  */
  25
  26
  27 #include <string.h>
  28 #include <console/console.h>
  29 #include <arch/acpi.h>
  30
  31 extern u32 pm_base; /* pm_base should be set in sb acpi */
  32
  33 void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){
  34
  35         acpi_header_t *header=&(fadt->header);
  36
  37         printk_debug("pm_base: 0x%04x\n", pm_base);
  38
  39         /* Prepare the header */
  40         memset((void *)fadt,0,sizeof(acpi_fadt_t));
  41         memcpy(header->signature,"FACP",4);
  42         header->length = 244;
  43         header->revision = 1;
  44         memcpy(header->oem_id,OEM_ID,6);
  45         memcpy(header->oem_table_id,"COREBOOT",8);
  46         memcpy(header->asl_compiler_id,ASLC,4);
  47         header->asl_compiler_revision=0;
  48
  49         fadt->firmware_ctrl=(u32)facs;
  50         fadt->dsdt= (u32)dsdt;
  51         // 3=Workstation,4=Enterprise Server, 7=Performance Server
  52         fadt->preferred_pm_profile=0x03;
  53         fadt->sci_int=9;
  54         // disable system management mode by setting to 0:
  55         fadt->smi_cmd = 0;//pm_base+0x2f;
  56         fadt->acpi_enable = 0xf0;
  57         fadt->acpi_disable = 0xf1;
  58         fadt->s4bios_req = 0x0;
  59         fadt->pstate_cnt = 0x00; // SMM is not used for p-state control
  60 //      fadt->pstate_cnt = 0xe2;
  61
  62         fadt->pm1a_evt_blk = pm_base;
  63         fadt->pm1b_evt_blk = 0x0000;
  64         fadt->pm1a_cnt_blk = pm_base+0x04;
  65         fadt->pm1b_cnt_blk = 0x0000;
  66         fadt->pm2_cnt_blk  = 0x0000;
  67         fadt->pm_tmr_blk   = pm_base+0x08;
  68         fadt->gpe0_blk     = pm_base+0x20;
  69         fadt->gpe1_blk     = pm_base+0xb0;
  70
  71         fadt->pm1_evt_len  =  4;
  72         fadt->pm1_cnt_len  =  2;
  73         fadt->pm2_cnt_len  =  0;
  74         fadt->pm_tmr_len   =  4;
  75         fadt->gpe0_blk_len =  4;
  76         fadt->gpe1_blk_len =  8;
  77         fadt->gpe1_base    = 16;
  78
  79         fadt->cst_cnt    = 0x00;// SMM is not used for p-state control
  80 //      fadt->cst_cnt    = 0xe3;
  81         fadt->p_lvl2_lat =  101;
  82         fadt->p_lvl3_lat = 1001;
  83         fadt->flush_size = 0;
  84         fadt->flush_stride = 0;
  85         fadt->duty_offset = 1;
  86         fadt->duty_width = 3;
  87         fadt->day_alrm = 0; // 0x7d these have to be
  88         fadt->mon_alrm = 0; // 0x7e added to cmos.layout
  89         fadt->century =  0; // 0x7f to make rtc alrm work
  90         fadt->iapc_boot_arch = 0x3; // See table 5-11
  91         fadt->flags = 0x25;
  92
  93         fadt->res2 = 0;
  94
  95         fadt->reset_reg.space_id = 1;
  96         fadt->reset_reg.bit_width = 8;
  97         fadt->reset_reg.bit_offset = 0;
  98         fadt->reset_reg.resv = 0;
  99         fadt->reset_reg.addrl = 0xcf9;
 100         fadt->reset_reg.addrh = 0x0;
 101
 102         fadt->reset_value = 6;
 103         fadt->x_firmware_ctl_l = (u32)facs;
 104         fadt->x_firmware_ctl_h = 0;
 105         fadt->x_dsdt_l = (u32)dsdt;
 106         fadt->x_dsdt_h = 0;
 107
 108         fadt->x_pm1a_evt_blk.space_id = 1;
 109         fadt->x_pm1a_evt_blk.bit_width = 32;
 110         fadt->x_pm1a_evt_blk.bit_offset = 0;
 111         fadt->x_pm1a_evt_blk.resv = 0;
 112         fadt->x_pm1a_evt_blk.addrl = pm_base;
 113         fadt->x_pm1a_evt_blk.addrh = 0x0;
 114
 115         fadt->x_pm1b_evt_blk.space_id = 1;
 116         fadt->x_pm1b_evt_blk.bit_width = 4;
 117         fadt->x_pm1b_evt_blk.bit_offset = 0;
 118         fadt->x_pm1b_evt_blk.resv = 0;
 119         fadt->x_pm1b_evt_blk.addrl = 0x0;
 120         fadt->x_pm1b_evt_blk.addrh = 0x0;
 121
 122
 123         fadt->x_pm1a_cnt_blk.space_id = 1;
 124         fadt->x_pm1a_cnt_blk.bit_width = 16;
 125         fadt->x_pm1a_cnt_blk.bit_offset = 0;
 126         fadt->x_pm1a_cnt_blk.resv = 0;
 127         fadt->x_pm1a_cnt_blk.addrl = pm_base+4;
 128         fadt->x_pm1a_cnt_blk.addrh = 0x0;
 129
 130         fadt->x_pm1b_cnt_blk.space_id = 1;
 131         fadt->x_pm1b_cnt_blk.bit_width = 2;
 132         fadt->x_pm1b_cnt_blk.bit_offset = 0;
 133         fadt->x_pm1b_cnt_blk.resv = 0;
 134         fadt->x_pm1b_cnt_blk.addrl = 0x0;
 135         fadt->x_pm1b_cnt_blk.addrh = 0x0;
 136
 137
 138         fadt->x_pm2_cnt_blk.space_id = 1;
 139         fadt->x_pm2_cnt_blk.bit_width = 0;
 140         fadt->x_pm2_cnt_blk.bit_offset = 0;
 141         fadt->x_pm2_cnt_blk.resv = 0;
 142         fadt->x_pm2_cnt_blk.addrl = 0x0;
 143         fadt->x_pm2_cnt_blk.addrh = 0x0;
 144
 145
 146         fadt->x_pm_tmr_blk.space_id = 1;
 147         fadt->x_pm_tmr_blk.bit_width = 32;
 148         fadt->x_pm_tmr_blk.bit_offset = 0;
 149         fadt->x_pm_tmr_blk.resv = 0;
 150         fadt->x_pm_tmr_blk.addrl = pm_base+0x08;
 151         fadt->x_pm_tmr_blk.addrh = 0x0;
 152
 153
 154         fadt->x_gpe0_blk.space_id = 1;
 155         fadt->x_gpe0_blk.bit_width = 32;
 156         fadt->x_gpe0_blk.bit_offset = 0;
 157         fadt->x_gpe0_blk.resv = 0;
 158         fadt->x_gpe0_blk.addrl = pm_base+0x20;
 159         fadt->x_gpe0_blk.addrh = 0x0;
 160
 161
 162         fadt->x_gpe1_blk.space_id = 1;
 163         fadt->x_gpe1_blk.bit_width = 64;
 164         fadt->x_gpe1_blk.bit_offset = 16;
 165         fadt->x_gpe1_blk.resv = 0;
 166         fadt->x_gpe1_blk.addrl = pm_base+0xb0;
 167         fadt->x_gpe1_blk.addrh = 0x0;
 168
 169         header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t));
 170
 171 }