2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
22 #include <arch/acpi.h>
23 #include <device/pci.h>
24 #include <device/pci_ids.h>
25 #include <cpu/x86/msr.h>
26 #include <cpu/amd/mtrr.h>
27 #include <cpu/amd/amdfam10_sysconf.h>
29 #include "mb_sysconf.h"
31 #define DUMP_ACPI_TABLES 0
33 #if DUMP_ACPI_TABLES == 1
34 static void dump_mem(u32 start, u32 end)
38 print_debug("dump_mem:");
39 for(i=start;i<end;i++) {
41 printk(BIOS_DEBUG, "\n%08x:", i);
43 printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
49 extern const unsigned char AmlCode[];
50 extern const unsigned char AmlCode_ssdt[];
52 #if CONFIG_ACPI_SSDTX_NUM >= 1
53 extern const unsigned char AmlCode_ssdt2[];
54 extern const unsigned char AmlCode_ssdt3[];
55 extern const unsigned char AmlCode_ssdt4[];
56 extern const unsigned char AmlCode_ssdt5[];
59 #define IO_APIC_ADDR 0xfec00000UL
61 unsigned long acpi_fill_mcfg(unsigned long current)
67 unsigned long acpi_fill_madt(unsigned long current)
71 struct mb_sysconf_t *m;
75 /* create all subtables for processors */
76 current = acpi_create_madt_lapics(current);
78 /* Write 8111 IOAPIC */
79 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8111,
82 /* Write all 8131 IOAPICs */
86 dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN((sysconf.hcdn[0]&0xff), 1));
88 res = find_resource(dev, PCI_BASE_ADDRESS_0);
90 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132_1,
91 res->base, gsi_base );
96 dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN((sysconf.hcdn[0] & 0xff)+1, 1));
98 res = find_resource(dev, PCI_BASE_ADDRESS_0);
100 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132_2,
101 res->base, gsi_base );
109 for(i=1; i< sysconf.hc_possible_num; i++) {
111 if(!(sysconf.pci1234[i] & 0x1) ) continue;
112 // 8131 need to use +4
113 switch (sysconf.hcid[i]) {
121 switch (sysconf.hcid[i]) {
124 dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1));
126 res = find_resource(dev, PCI_BASE_ADDRESS_0);
128 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132a[j][0],
129 res->base, gsi_base );
133 dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1));
135 res = find_resource(dev, PCI_BASE_ADDRESS_0);
137 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132a[j][1],
138 res->base, gsi_base );
149 current += acpi_create_madt_irqoverride( (acpi_madt_irqoverride_t *) current, 0, 0, 2, 5 );
150 /* 0: mean bus 0--->ISA */
153 /* 5 mean: 0101 --> Edige-triggered, Active high*/
156 /* create all subtables for processors */
157 current = acpi_create_madt_lapic_nmis(current, 5, 1);
158 /* 1: LINT1 connect to NMI */
163 unsigned long write_acpi_tables(unsigned long start)
165 unsigned long current;
176 acpi_header_t *ssdtx;
181 get_bus_conf(); //it will get sblk, pci1234, hcdn, and sbdn
183 /* Align ACPI tables to 16 bytes */
184 start = ( start + 0x0f) & -0x10;
187 printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
189 /* We need at least an RSDP and an RSDT Table */
190 rsdp = (acpi_rsdp_t *) current;
191 current += sizeof(acpi_rsdp_t);
192 rsdt = (acpi_rsdt_t *) current;
193 current += sizeof(acpi_rsdt_t);
195 /* clear all table memory */
196 memset((void *)start, 0, current - start);
198 acpi_write_rsdp(rsdp, rsdt, NULL);
199 acpi_write_rsdt(rsdt);
202 * We explicitly add these tables later on:
204 current = ( current + 0x07) & -0x08;
205 printk(BIOS_DEBUG, "ACPI: * HPET at %lx\n", current);
206 hpet = (acpi_hpet_t *) current;
207 current += sizeof(acpi_hpet_t);
208 acpi_create_hpet(hpet);
209 acpi_add_table(rsdp, hpet);
211 /* If we want to use HPET Timers Linux wants an MADT */
212 current = ( current + 0x07) & -0x08;
213 printk(BIOS_DEBUG, "ACPI: * MADT at %lx\n", current);
214 madt = (acpi_madt_t *) current;
215 acpi_create_madt(madt);
216 current+=madt->header.length;
217 acpi_add_table(rsdp, madt);
220 current = ( current + 0x07) & -0x08;
221 printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current);
222 srat = (acpi_srat_t *) current;
223 acpi_create_srat(srat);
224 current+=srat->header.length;
225 acpi_add_table(rsdp, srat);
228 current = ( current + 0x07) & -0x08;
229 printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current);
230 slit = (acpi_slit_t *) current;
231 acpi_create_slit(slit);
232 current+=slit->header.length;
233 acpi_add_table(rsdp, slit);
236 current = ( current + 0x0f) & -0x10;
237 printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current);
238 ssdt = (acpi_header_t *)current;
239 memcpy(ssdt, &AmlCode_ssdt, sizeof(acpi_header_t));
240 current += ssdt->length;
241 memcpy(ssdt, &AmlCode_ssdt, ssdt->length);
242 //Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c
243 update_ssdt((void*)ssdt);
244 /* recalculate checksum */
246 ssdt->checksum = acpi_checksum((unsigned char *)ssdt, ssdt->length);
247 acpi_add_table(rsdp, ssdt);
249 printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
250 current = acpi_add_ssdt_pstates(rsdp, current);
252 #if CONFIG_ACPI_SSDTX_NUM >= 1
254 /* same htio, but different possition? We may have to copy,
255 change HCIN, and recalculate the checknum and add_table */
257 for(i=1;i<sysconf.hc_possible_num;i++) { // 0: is hc sblink
258 if((sysconf.pci1234[i] & 1) != 1 ) continue;
261 c = (u8) ('4' + i - 1);
264 c = (u8) ('A' + i - 1 - 6);
266 current = ( current + 0x07) & -0x08;
267 printk(BIOS_DEBUG, "ACPI: * SSDT for PCI%c at %lx\n", c, current); //pci0 and pci1 are in dsdt
268 ssdtx = (acpi_header_t *)current;
269 switch(sysconf.hcid[i]) {
283 memcpy(ssdtx, p, sizeof(acpi_header_t));
284 current += ssdtx->length;
285 memcpy(ssdtx, p, ssdtx->length);
286 update_ssdtx((void *)ssdtx, i);
288 ssdtx->checksum = acpi_checksum((u8 *)ssdtx, ssdtx->length);
289 acpi_add_table(rsdp, ssdtx);
294 current = ( current + 0x07) & -0x08;
295 printk(BIOS_DEBUG, "ACPI: * DSDT at %lx\n", current);
296 dsdt = (acpi_header_t *)current;
297 memcpy(dsdt, &AmlCode, sizeof(acpi_header_t));
298 current += dsdt->length;
299 memcpy(dsdt, &AmlCode, dsdt->length);
300 printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt, dsdt->length);
302 /* FACS */ // it needs 64 bit alignment
303 current = ( current + 0x07) & -0x08;
304 printk(BIOS_DEBUG, "ACPI: * FACS at %lx\n", current);
305 facs = (acpi_facs_t *) current;
306 current += sizeof(acpi_facs_t);
307 acpi_create_facs(facs);
310 current = ( current + 0x07) & -0x08;
311 printk(BIOS_DEBUG, "ACPI: * FADT at %lx\n", current);
312 fadt = (acpi_fadt_t *) current;
313 current += sizeof(acpi_fadt_t);
315 acpi_create_fadt(fadt, facs, dsdt);
316 acpi_add_table(rsdp, fadt);
318 #if DUMP_ACPI_TABLES == 1
319 printk(BIOS_DEBUG, "rsdp\n");
320 dump_mem(rsdp, ((void *)rsdp) + sizeof(acpi_rsdp_t));
322 printk(BIOS_DEBUG, "rsdt\n");
323 dump_mem(rsdt, ((void *)rsdt) + sizeof(acpi_rsdt_t));
325 printk(BIOS_DEBUG, "madt\n");
326 dump_mem(madt, ((void *)madt) + madt->header.length);
328 printk(BIOS_DEBUG, "srat\n");
329 dump_mem(srat, ((void *)srat) + srat->header.length);
331 printk(BIOS_DEBUG, "slit\n");
332 dump_mem(slit, ((void *)slit) + slit->header.length);
334 printk(BIOS_DEBUG, "ssdt\n");
335 dump_mem(ssdt, ((void *)ssdt) + ssdt->length);
337 printk(BIOS_DEBUG, "fadt\n");
338 dump_mem(fadt, ((void *)fadt) + fadt->header.length);
341 printk(BIOS_INFO, "ACPI: done.\n");