Get rid of the old romstage-as-bootblock ROM layout
[coreboot.git] / src / mainboard / amd / serengeti_cheetah_fam10 / Kconfig
1 if BOARD_AMD_SERENGETI_CHEETAH_FAM10
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_F_1207
7         select DIMM_DDR2
8         select DIMM_REGISTERED
9         select NORTHBRIDGE_AMD_AMDFAM10
10         select SOUTHBRIDGE_AMD_AMD8111
11         select SOUTHBRIDGE_AMD_AMD8132
12         select SUPERIO_WINBOND_W83627HF
13         select BOARD_HAS_FADT
14         select HAVE_BUS_CONFIG
15         select HAVE_OPTION_TABLE
16         select HAVE_PIRQ_TABLE
17         select HAVE_MP_TABLE
18         select HAVE_HARD_RESET
19         select SB_HT_CHAIN_UNITID_OFFSET_ONLY
20         select SERIAL_CPU_INIT
21         select AMDMCT
22         select HAVE_ACPI_TABLES
23         select BOARD_ROMSIZE_KB_1024
24         select RAMINIT_SYSINFO
25         select ENABLE_APIC_EXT_ID
26         select LIFT_BSP_APIC_ID
27         select QRANK_DIMM_SUPPORT
28
29 config MAINBOARD_DIR
30         string
31         default amd/serengeti_cheetah_fam10
32
33 config APIC_ID_OFFSET
34         hex
35         default 0x0
36
37 config MAINBOARD_PART_NUMBER
38         string
39         default "Serengeti Cheetah (Fam10)"
40
41 # 6 * MAX_PHYSICAL_CPUS
42 config MAX_CPUS
43         int
44         default 48
45
46 config MAX_PHYSICAL_CPUS
47         int
48         default 8
49
50 config MEM_TRAIN_SEQ
51         int
52         default 2
53
54 config SB_HT_CHAIN_ON_BUS0
55         int
56         default 2
57
58 config HT_CHAIN_END_UNITID_BASE
59         hex
60         default 0x6
61
62 config HT_CHAIN_UNITID_BASE
63         hex
64         default 0xa
65
66 config IRQ_SLOT_COUNT
67         int
68         default 11
69
70 config AMD_UCODE_PATCH_FILE
71         string
72         default "mc_patch_01000095.h"
73
74 config RAMTOP
75         hex
76         default 0x1000000
77
78 config HEAP_SIZE
79         hex
80         default 0xc0000
81
82 config ACPI_SSDTX_NUM
83         int
84         default 5
85
86 config RAMBASE
87         hex
88         default 0x200000
89
90 config ID_SECTION_OFFSET
91         hex
92         default 0x80
93
94 endif # BOARD_AMD_SERENGETI_CHEETAH_FAM10