src/mainboard/amd/serengeti_cheetah_fam10/Config.lb

   1 #
   2 # This file is part of the coreboot project.
   3 #
   4 # Copyright (C) 2007 Advanced Micro Devices, Inc.
   5 #
   6 # This program is free software; you can redistribute it and/or modify
   7 # it under the terms of the GNU General Public License as published by
   8 # the Free Software Foundation; version 2 of the License.
   9 #
  10 # This program is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See the
  13 # GNU General Public License for more details.
  14 #
  15 # You should have received a copy of the GNU General Public License
  16 # along with this program; if not, write to the Free Software
  17 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18 #
  19
  20 ## CONFIG_XIP_ROM_SIZE must be a power of 2.
  21 default CONFIG_XIP_ROM_SIZE = 64 * 1024
  22 include /config/failovercalculation.lb
  23
  24 arch i386 end
  25
  26 ##
  27 ## Build the objects we have code for in this directory.
  28 ##
  29
  30 driver mainboard.o
  31
  32
  33 #needed by irq_tables and mptable and acpi_tables
  34 object get_bus_conf.o
  35
  36 if CONFIG_GENERATE_MP_TABLE
  37         object mptable.o
  38 end
  39
  40 if CONFIG_GENERATE_PIRQ_TABLE
  41         object irq_tables.o
  42 end
  43
  44 if CONFIG_GENERATE_ACPI_TABLES
  45          object acpi_tables.o
  46          object fadt.o
  47         makerule dsdt.c
  48                 depends "$(CONFIG_MAINBOARD)/dx/dsdt_lb.dsl"
  49                 action  "iasl -p $(CURDIR)/dsdt_lb -tc $(CONFIG_MAINBOARD)/dx/dsdt_lb.dsl"
  50                 action  "mv dsdt_lb.hex dsdt.c"
  51         end
  52          object ./dsdt.o
  53
  54         #./ssdt.o is moved to northbridge/amd/amdk8/Config.lb
  55
  56         if CONFIG_ACPI_SSDTX_NUM
  57         makerule ssdt2.c
  58                 depends "$(CONFIG_MAINBOARD)/dx/pci2.asl"
  59                 action  "iasl -p $(CURDIR)/pci2 -tc $(CONFIG_MAINBOARD)/dx/pci2.asl"
  60                 action  "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex"
  61                 action  "mv pci2.hex ssdt2.c"
  62         end
  63         object ./ssdt2.o
  64         makerule ssdt3.c
  65                 depends "$(CONFIG_MAINBOARD)/dx/pci3.asl"
  66                 action  "iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/dx/pci3.asl"
  67                 action  "perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex"
  68                 action  "mv pci3.hex ssdt3.c"
  69         end
  70         object ./ssdt3.o
  71         makerule ssdt4.c
  72                 depends "$(CONFIG_MAINBOARD)/dx/pci4.asl"
  73                 action  "iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl"
  74                 action  "perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex"
  75                 action  "mv pci4.hex ssdt4.c"
  76         end
  77         object ./ssdt4.o
  78         makerule ssdt5.c
  79                 depends "$(CONFIG_MAINBOARD)/dx/pci5.asl"
  80                 action  "iasl -p $(CURDIR)/pci5 -tc $(CONFIG_MAINBOARD)/dx/pci5.asl"
  81                 action  "perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' pci5.hex"
  82                 action  "mv pci5.hex ssdt5.c"
  83         end
  84         object ./ssdt5.o
  85          end
  86 end
  87
  88         if CONFIG_USE_INIT
  89                 # compile cache_as_ram.c to auto.o
  90                 makerule ./cache_as_ram_auto.o
  91                         depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
  92                         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
  93                 end
  94
  95         else
  96                 #compile cache_as_ram.c to auto.inc
  97                 makerule ./cache_as_ram_auto.inc
  98                         depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
  99                         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
 100                         action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
 101                         action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
 102                 end
 103
 104         end
 105
 106 if CONFIG_USE_FAILOVER_IMAGE
 107 else
 108     if CONFIG_AP_CODE_IN_CAR
 109          makerule ./apc_auto.o
 110                  depends "$(CONFIG_MAINBOARD)/apc_auto.c option_table.h"
 111                  action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/apc_auto.c -o $@"
 112          end
 113          ldscript /arch/i386/init/ldscript_apc.lb
 114     end
 115 end
 116
 117 ##
 118 ## Build our 16 bit and 32 bit coreboot entry code
 119 ##
 120
 121 if CONFIG_HAVE_FAILOVER_BOOT
 122     if CONFIG_USE_FAILOVER_IMAGE
 123         mainboardinit cpu/x86/16bit/entry16.inc
 124         ldscript /cpu/x86/16bit/entry16.lds
 125     end
 126 else
 127     if CONFIG_USE_FALLBACK_IMAGE
 128         mainboardinit cpu/x86/16bit/entry16.inc
 129         ldscript /cpu/x86/16bit/entry16.lds
 130     end
 131 end
 132
 133 mainboardinit cpu/x86/32bit/entry32.inc
 134          if CONFIG_USE_INIT
 135                  ldscript /cpu/x86/32bit/entry32.lds
 136          end
 137
 138          if CONFIG_USE_INIT
 139                  ldscript /cpu/amd/car/cache_as_ram.lds
 140          end
 141
 142 ##
 143 ## Build our reset vector (This is where coreboot is entered)
 144 ##
 145 if CONFIG_HAVE_FAILOVER_BOOT
 146     if CONFIG_USE_FAILOVER_IMAGE
 147         mainboardinit cpu/x86/16bit/reset16.inc
 148         ldscript /cpu/x86/16bit/reset16.lds
 149     else
 150         mainboardinit cpu/x86/32bit/reset32.inc
 151         ldscript /cpu/x86/32bit/reset32.lds
 152     end
 153 else
 154     if CONFIG_USE_FALLBACK_IMAGE
 155         mainboardinit cpu/x86/16bit/reset16.inc
 156         ldscript /cpu/x86/16bit/reset16.lds
 157     else
 158         mainboardinit cpu/x86/32bit/reset32.inc
 159         ldscript /cpu/x86/32bit/reset32.lds
 160     end
 161 end
 162
 163
 164 ##
 165 ## Include an id string (For safe flashing)
 166 ##
 167 mainboardinit arch/i386/lib/id.inc
 168 ldscript /arch/i386/lib/id.lds
 169
 170         ##
 171         ## Setup Cache-As-Ram
 172         ##
 173         mainboardinit cpu/amd/car/cache_as_ram.inc
 174
 175 ###
 176 ### This is the early phase of coreboot startup
 177 ### Things are delicate and we test to see if we should
 178 ### failover to another image.
 179 ###
 180 if CONFIG_HAVE_FAILOVER_BOOT
 181     if CONFIG_USE_FAILOVER_IMAGE
 182                 ldscript /arch/i386/lib/failover_failover.lds
 183     end
 184 else
 185     if CONFIG_USE_FALLBACK_IMAGE
 186                 ldscript /arch/i386/lib/failover.lds
 187     end
 188 end
 189
 190 ###
 191 ### O.k. We aren't just an intermediary anymore!
 192 ###
 193
 194 ##
 195 ## Setup RAM
 196 ##
 197         if CONFIG_USE_INIT
 198                 initobject cache_as_ram_auto.o
 199         else
 200                 mainboardinit ./cache_as_ram_auto.inc
 201         end
 202
 203 ##
 204 ## Include the secondary Configuration files
 205 ##
 206 config chip.h
 207
 208 dir /southbridge/amd/amd8151
 209
 210 # sample config for amd/serengeti_cheetah_fam10
 211 chip northbridge/amd/amdfam10/root_complex
 212         device apic_cluster 0 on
 213                 chip cpu/amd/socket_F_1207  #L1 and DDR2
 214                          device apic 0 on end
 215                 end
 216         end
 217         device pci_domain 0 on
 218                 chip northbridge/amd/amdfam10
 219                         device pci 18.0 on #  northbridge
 220                                 #  devices on link 0, link 0 == LDT 0
 221                                 chip southbridge/amd/amd8132
 222                                         # the on/off keyword is mandatory
 223                                         device pci 0.0 on end
 224                                         device pci 0.1 on end
 225                                         device pci 1.0 on end
 226                                         device pci 1.1 on end
 227                                 end
 228                                 chip southbridge/amd/amd8111
 229                                         # this "device pci 0.0" is the parent the next one
 230                                         # PCI bridge
 231                                         device pci 0.0 on
 232                                                 device pci 0.0 on end
 233                                                 device pci 0.1 on end
 234                                                 device pci 0.2 off end
 235                                                 device pci 1.0 off end
 236                                         end
 237                                         device pci 1.0 on
 238                                                 chip superio/winbond/w83627hf
 239                                                         device pnp 2e.0 off #  Floppy
 240                                                                 io 0x60 = 0x3f0
 241                                                                 irq 0x70 = 6
 242                                                                 drq 0x74 = 2
 243                                                         end
 244                                                         device pnp 2e.1 off #  Parallel Port
 245                                                                 io 0x60 = 0x378
 246                                                                 irq 0x70 = 7
 247                                                         end
 248                                                         device pnp 2e.2 on #  Com1
 249                                                                 io 0x60 = 0x3f8
 250                                                                 irq 0x70 = 4
 251                                                         end
 252                                                         device pnp 2e.3 off #  Com2
 253                                                                 io 0x60 = 0x2f8
 254                                                                 irq 0x70 = 3
 255                                                         end
 256                                                         device pnp 2e.5 on #  Keyboard
 257                                                                 io 0x60 = 0x60
 258                                                                 io 0x62 = 0x64
 259                                                                 irq 0x70 = 1
 260                                                                 irq 0x72 = 12
 261                                                         end
 262                                                         device pnp 2e.6 off #  CIR
 263                                                                 io 0x60 = 0x100
 264                                                         end
 265                                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
 266                                                                 io 0x60 = 0x220
 267                                                                 io 0x62 = 0x300
 268                                                                 irq 0x70 = 9
 269                                                         end
 270                                                         device pnp 2e.8 off end #  GPIO2
 271                                                         device pnp 2e.9 off end #  GPIO3
 272                                                         device pnp 2e.a off end #  ACPI
 273                                                         device pnp 2e.b on #  HW Monitor
 274                                                                 io 0x60 = 0x290
 275                                                                 irq 0x70 = 5
 276                                                         end
 277                                                 end
 278                                         end
 279                                         device pci 1.1 on end
 280                                         device pci 1.2 on end
 281                                         device pci 1.3 on
 282                                                 chip drivers/i2c/i2cmux2 # pca9556 smbus mux
 283                                                 chip drivers/i2c/i2cmux2 # pca9556 smbus mux
 284                                                         device i2c 18 on #0 pca9516 1
 285                                                                 chip drivers/generic/generic #dimm 0-0-0
 286                                                                         device i2c 50 on end
 287                                                                 end
 288                                                                 chip drivers/generic/generic #dimm 0-0-1
 289                                                                         device i2c 51 on end
 290                                                                 end
 291                                                                 chip drivers/generic/generic #dimm 0-1-0
 292                                                                         device i2c 52 on end
 293                                                                 end
 294                                                                 chip drivers/generic/generic #dimm 0-1-1
 295                                                                         device i2c 53 on end
 296                                                                 end
 297                                                         end
 298                                                         device i2c 18 on #1 pca9516 2
 299                                                                 chip drivers/generic/generic #dimm 1-0-0
 300                                                                         device i2c 50 on end
 301                                                                 end
 302                                                                 chip drivers/generic/generic #dimm 1-0-1
 303                                                                         device i2c 51 on end
 304                                                                 end
 305                                                                 chip drivers/generic/generic #dimm 1-1-0
 306                                                                         device i2c 52 on end
 307                                                                 end
 308                                                                 chip drivers/generic/generic #dimm 1-1-1
 309                                                                         device i2c 53 on end
 310                                                                 end
 311                                                         end
 312                                                 end
 313                                                 end
 314                                         end # acpi
 315                                         device pci 1.5 off end
 316                                         device pci 1.6 off end
 317                                         register "ide0_enable" = "1"
 318                                         register "ide1_enable" = "1"
 319                                 end
 320                         end #  device pci 18.0
 321
 322                         device pci 18.0 on end
 323                         device pci 18.0 on end
 324                         device pci 18.1 on end
 325                         device pci 18.2 on end
 326                         device pci 18.3 on end
 327                         device pci 18.4 on end
 328 #                       device pci 00.5 on end
 329                 end
 330         end #pci_domain
 331         #for node 32 to node 63
 332 #       device pci_domain 0 on
 333 #               chip northbridge/amd/amdfam10
 334 #                         device pci 00.0 on end#  northbridge
 335 #                         device pci 00.0 on end
 336 #                         device pci 00.0 on end
 337 #                         device pci 00.0 on end
 338 #                         device pci 00.1 on end
 339 #                         device pci 00.2 on end
 340 #                         device pci 00.3 on end
 341 #                         device pci 00.4 on end
 342 #                        device pci 00.5 on end
 343 #               end
 344 #       end #pci_domain
 345
 346 #         chip drivers/generic/debug
 347 #                device pnp 0.0 off end # chip name
 348 #                 device pnp 0.1 on end # pci_regs_all
 349 #                 device pnp 0.2 off end # mem
 350 #                 device pnp 0.3 off end # cpuid
 351 #                 device pnp 0.4 off end # smbus_regs_all
 352 #                 device pnp 0.5 off end # dual core msr
 353 #                 device pnp 0.6 off end # cache size
 354 #                 device pnp 0.7 off end # tsc
 355 #                 device pnp 0.8 off end # hard reset
 356 #                 device pnp 0.9 off end # mcp55
 357 #                 device pnp 0.a on end # GH ext table
 358 #        end
 359
 360 end
 361
 362